JPS62266829A - Formation of shallow junction layer - Google Patents

Abstract

PURPOSE:To form a shallow junction layer for preventing a bad influence of a short channel consequent on miniaturization of an element by implanting silicon ions into a semiconductor substrate and depositing a conductive impurity source and heating the substrate by use of a halogen lamp. CONSTITUTION:A field oxide film 4 is formed on an N-type Si substrate 1. After forming a gate electrode 5, Si ions are implanted. The oxide film on source and drain parts is removed and a BSG film 6 is deposited there. Then, by heating diffusion using a halogen lamp, a shallow boron diffusion layer 7 is formed. The BSG film 6 is removed and a clean thermal oxidation film is formed. On that film, if an NSG film 8 is deposited and an A electrode 10 for source and drain is formed, a P-channel MOS transistor will be fabricated. lt is also possible to fabricate an N-channel MOS transistor by diffusing phosphorus into a P-type substrate while using a PSG film.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a method for forming a shallow bonding layer used in a semiconductor device.

<Prior Art> P+, n+ junction layers used in semiconductor devices are required to be shallower as elements become smaller. conventionally,
A bonding layer has been formed with good controllability by performing electric furnace annealing after ion implantation.

<Problems to be solved by the invention> However, forming a good bonding layer of 0.1 μm or less, which will be required in the future, is at the limit of lowering the energy of ion implantation equipment and the range of using low-mass boron. This has become extremely difficult due to difficulties in compression, problems in annealing controllability, etc.

Therefore, an object of the present invention is to provide a method for forming a shallow bonding layer in order to prevent adverse effects such as short channel effects caused by miniaturization of elements.

Means for solving problems> Silicon Φ ions are implanted into a semiconductor substrate, a PSG film or a BSG film is attached as a conductive impurity source, and phosphorus or boron is removed by heating with a halogen lamp. Diffusion into the semiconductor substrate to form a shallow bonding layer.

The purpose of using silicon ion implantation is to form a shallow amorphous layer on the order of 0.1 μm in a silicon substrate. The amorphous layer absorbs infrared rays more strongly (this is because the temperature rises faster in that area, allowing impurities to diffuse).

・Example> Hereinafter, a case in which the present invention is applied to a method for manufacturing a MOS transistor will be described.

FIG. 2 is a cross-sectional structural diagram of a MOS transistor manufactured using the present invention, and FIGS. 1(a) to 1(a) are manufacturing process diagrams.

First, an n-type silicon substrate 1 is thermally oxidized to form an oxide film (Si02 film) 2 of 60 OA on its surface (Fig. 1(a)).Subsequently, a silicon nitride film 3 is deposited and patterned. (Fig. 1(b)).Next, a field oxide film 4 is formed and the silicon nitride film 3 is removed (Fig. 1(b)).
C)). Next, after depositing 450 OA of polysilicon and etching unnecessary parts to form the gate electrode 5, silicon ions were deposited at 70 keV and 3 X I Q 15
ions/i (Fig. 1(d)). Next, the oxide film on the source and drain parts was removed, and a BSG film (1500
A) 6 is deposited and heated and diffused using a halogen lamp to form a diffusion layer (source, drain region) 7 (FIG. 1(e)). Polysilicon gate electrode 5, silicon substrate l, field oxide film 4 and gate oxide film 4
' BSG film 6 is etched using a highly selective method with
Then, a clean thermal oxide film (not shown) with low level density at the S1 interface is formed, and an NSC film 8 is formed on it.
is deposited to form a contact hole 9 (Fig. 1 [f)
). A p-channel MOS transistor can be manufactured by forming source and drain aluminum electrodes 10 (first
Figure (g)).

If a p-type substrate is used and a PSG film is used, n-channel M
You can also make OS transistors.

Note that as the gate electrode, in addition to polysilicon, a high melting point metal or its silicide, or even polycide can be used. Further, as the substrate, an epitaxial substrate and a p
A substrate on which a well or an n-well is formed can be used.

The thickness of the PSG film or BSG film, the phosphorus concentration in the PSG film, the boron concentration in the BSG film, and the above-mentioned film thickness.

The concentration and junction depth of the diffusion layer can be controlled by the implantation amount and implantation energy of the recon ions.

<Invention C) Effect> As explained in detail above, the present invention is characterized in that a shallow bonding layer is formed using selective heating of a shallow amorphous layer formed by silicon ion implantation. This provides an extremely useful technique for forming a shallow and good bonding layer of about 0.1 pm or less, which will be required in the future.

[Brief explanation of drawings]

FIG. 1 is a manufacturing process diagram, and FIG. 2 is a cross-sectional structural diagram. Explanation of symbols 1: Silicon substrate, 2: Oxide film, 3: Silicon nitride film,
4: Field oxide film, 41: Gate oxide film, 5: Gate electrode, 6: BSG film, 7: Diffusion layer, 8: NSG film, 9: Contact hole, IO = aluminum electrode for source and drain. Agent Patent attorney Takeshi Sugiyama (and 1 other person) (C) (d) Figure 1

Claims (1)

[Claims] 1. Injecting silicon ions into a semiconductor substrate, attaching a PSG film or BSG film as a conductive impurity source, and diffusing phosphorus or boron into the semiconductor substrate by heating with a halogen lamp. A method for forming a shallow bonding layer, the method comprising forming a shallow bonding layer.