JPH04245424A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide the manufacturing method, of a semiconductor device, which can form a shallow impurity diffusion layer. CONSTITUTION:A mask layer 2 having an opening part 3 is formed on a silicon substrate 1 (A). A lamp annealing treatment is executed in a gas atmosphere which is composed of a reaction gas such as phosphine (PH3), a diborane (B2H6) or the like and of oxygen gas; a silicon oxide layer 4 which contains impurity atoms is formed (B). When a heat treatment is executed in a high-temperature atmosphere, the impurity atoms contained in the silicon oxide layer 4 are diffused to the silicon substrate 1; an layer 4 is removed (D).

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an impurity diffusion layer in a semiconductor device.

0002

[Prior Art] When forming an impurity diffusion layer constituting the source/drain of a MOS transistor or the emitter of a bipolar transistor, impurities are conventionally formed by ion implantation or thermal diffusion in a vapor or liquid phase. It was being introduced.

0003

[Problems to be Solved by the Invention] When miniaturizing elements, it is necessary to form shallow impurity diffusion layers based on the shrink law. However, with the above conventional method, it is difficult to form a shallow impurity diffusion layer.

An object of the present invention is to provide a method for manufacturing a semiconductor device that allows formation of a shallow impurity diffusion layer.

[0005]

[Means for Solving the Problems] A method for manufacturing a semiconductor device according to the present invention includes the steps of forming a mask layer having openings on a silicon substrate to prevent the intrusion of impurities, and a reactive gas containing impurity atoms. and a step of forming a silicon oxide layer containing the impurity atoms on the surface of the silicon substrate in the opening by performing lamp annealing treatment in a gas atmosphere containing oxygen gas, and performing heat treatment in a high temperature atmosphere. The step of diffusing the impurity atoms contained in the silicon oxide layer into the silicon substrate to form an impurity diffusion layer.

[0006]

EXAMPLE FIGS. 1A to 1D are cross-sectional views schematically showing the manufacturing process of an example.

1 is a silicon substrate, 2 is a mask layer using silicon oxide, 3 is an opening formed in the mask layer 2, and 4 is a mask layer made of silicon oxide.
5 is a silicon oxide layer containing impurity atoms, and 5 is an impurity diffusion layer.

Next, the manufacturing process will be explained with reference to FIGS. 1(A) to 1(D).

(A) A mask layer 2 having an opening 3 is formed on the main surface side of the silicon substrate 1. Silicon oxide is used for this mask layer 2, and its layer thickness is set to a thickness that can sufficiently prevent impurities from diffusing into the silicon substrate 1 in a diffusion process to be described later, for example, about several hundred nanometers.

(B) In a gas atmosphere containing a reactive gas such as phosphine (PH3) or diborane (B2H6) and oxygen (O2) gas (the proportion of the reactive gas is about 10 mol% to the oxygen gas), the lamp animate - Perform lamp annealing using a laser. As the reactive gas, in addition to phosphine and diborane, gases containing impurity atoms that serve as donors and acceptors can be used as appropriate. Lamp annealing is performed at a temperature of 1000 to 1150 degrees Celsius for several seconds.
Do this for about ten seconds. By this lamp annealing process, a silicon oxide layer 4 (layer thickness of about several tens of nanometers) containing a high concentration of impurity atoms is formed on the surface of the silicon substrate 1 in the opening 3.

(C) Solid-phase diffusion of impurity atoms from the silicon oxide layer 4 to the silicon substrate 1 is performed by performing heat treatment in an inert gas atmosphere such as argon (Ar). The heat treatment is performed by furnace annealing or lamp annealing. Through this heat treatment, a shallow impurity diffusion layer 5 with a thickness of about 100 nm is formed.

(D) The silicon oxide layer 4 is removed using a wet etching method using hydrofluoric acid or an etch-back method. At this time, the surface side of the mask layer 2 is also etched to a similar thickness.

The impurity diffusion layer 5 formed as described above can be used as a source/drain of a MOS transistor, an emitter of a bipolar transistor, etc.

[0014]

According to the present invention, a silicon oxide layer is formed by performing lamp annealing treatment in a gas atmosphere containing a reactive gas containing impurity atoms and oxygen gas, and solid-phase diffusion from this silicon oxide layer is achieved. Since impurity atoms are diffused into the silicon substrate to form an impurity diffusion layer, it is possible to form a shallow impurity diffusion layer.

[Brief explanation of the drawing]

FIG. 1A to FIG. 1D are cross-sectional views schematically showing the manufacturing process of an example.

[Explanation of symbols]

1...Silicon substrate 2...Mask layer 3...Opening 4...Silicon oxide layer 5... Impurity diffusion layer

Claims (1)

[Claims] Claim 1: Forming a mask layer having an opening on a silicon substrate to prevent impurities from entering, and performing lamp annealing in a gas atmosphere containing a reactive gas containing impurity atoms and oxygen gas. By forming a silicon oxide layer containing the impurity atoms on the surface of the silicon substrate in the opening and performing heat treatment in a high temperature atmosphere, the impurity atoms contained in the silicon oxide layer are removed from the silicon. A method for manufacturing a semiconductor device comprising the step of forming an impurity diffusion layer by diffusing into a substrate.