JPH02278818A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02278818A JPH02278818A JP10088389A JP10088389A JPH02278818A JP H02278818 A JPH02278818 A JP H02278818A JP 10088389 A JP10088389 A JP 10088389A JP 10088389 A JP10088389 A JP 10088389A JP H02278818 A JPH02278818 A JP H02278818A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- carbon film
- polycrystalline
- diffusion region
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 21
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000009792 diffusion process Methods 0.000 claims abstract description 43
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 239000012535 impurity Substances 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 33
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 32
- 238000005468 ion implantation Methods 0.000 claims abstract description 14
- 238000010438 heat treatment Methods 0.000 claims abstract description 13
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 14
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 abstract description 4
- 150000002500 ions Chemical class 0.000 abstract description 4
- 239000004215 Carbon black (E152) Substances 0.000 abstract description 2
- 229930195733 hydrocarbon Natural products 0.000 abstract description 2
- 150000002430 hydrocarbons Chemical class 0.000 abstract description 2
- 239000011259 mixed solution Substances 0.000 abstract description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 abstract description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 238000005229 chemical vapour deposition Methods 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000013078 crystal Substances 0.000 abstract 1
- 229910052757 nitrogen Inorganic materials 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 239000007787 solid Substances 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 239000007790 solid phase Substances 0.000 description 10
- 238000009826 distribution Methods 0.000 description 6
- 230000001133 acceleration Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001721 carbon Chemical class 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概 要〕
半導体装置の製造方法、特に、半導体基板の表面部に不
純物拡散領域を形成する方法にに関し、固相拡散源とす
る多結晶シリコン膜を拡散後に残さざるを得ないといっ
たような制約なしに、浅い拡散領域を精度良く形成し得
るようにすることを目的とし、
半導体基板上に多結晶炭素膜を形成し、イオン打ち込み
により該炭素膜内に不純物を注入する工程と、熱処理に
より該炭素膜中の該不純物を該基板に拡散させる工程と
を有して、該基板に不純物拡散領域を形成するように構
成する。[Detailed Description of the Invention] [Summary] Regarding a method of manufacturing a semiconductor device, particularly a method of forming an impurity diffusion region on the surface of a semiconductor substrate, a polycrystalline silicon film serving as a solid phase diffusion source is not left behind after diffusion. The purpose of this method is to form a shallow diffusion region with high precision without any constraints such as not being able to obtain the desired results, by forming a polycrystalline carbon film on a semiconductor substrate and implanting impurities into the carbon film by ion implantation. and a step of diffusing the impurity in the carbon film into the substrate by heat treatment to form an impurity diffusion region in the substrate.
[産業上の利用分野]
本発明は、半導体装置の製造方法に係り、特に、半導体
基板の表面部に不純物拡散領域を形成する方法に関する
。[Industrial Field of Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming an impurity diffusion region in a surface portion of a semiconductor substrate.
半導体基板の表面部に形成する不純物拡散領域・には、
例えば電界効果トランジスタ(FET)のソース/ドレ
イン領域やバイポーラトランジスタのベース領域、エミ
ッタ領域などがある。In the impurity diffusion region formed on the surface of the semiconductor substrate,
Examples include source/drain regions of field effect transistors (FETs), base regions and emitter regions of bipolar transistors.
そして半導体装置の高集積化により素子の@細化が進む
に伴い、これらの拡散領域は、その深さを益々浅く形成
することが要求されてきている。As semiconductor devices become more highly integrated and elements become thinner, these diffusion regions are required to be formed with shallower and shallower depths.
上記拡散領域を形成する方法は、太き(は、■イオン打
ち込みを用いる方法、■イオン打ち込み以外による方法
、に分けられる。The methods for forming the above-mentioned diffusion regions are divided into two types: (1) a method using ion implantation, and (2) a method using a method other than ion implantation.
■のイオン打ち込みを用いる方法は、その精度の高さ、
分布ばらつきの少なさから、多用されている。しかしな
がらこの方法は、イオンを加速して打ち込むという原理
を用いているために、打ち込み不純物イオンが基板中に
成る程度の深さと深さ方向の拡がりをもって入ってしま
い、拡散領域の深さを例えば1500人程度以下に形成
することが困難である問題点がある。■The method using ion implantation has high accuracy,
It is widely used because of its low distribution variation. However, since this method uses the principle of accelerating ions and implanting them, the implanted impurity ions enter the substrate at a depth and spread in the depth direction, reducing the depth of the diffusion region to, for example, 1,500 mm. There is a problem in that it is difficult to form a structure smaller than that of a human.
■の方法には、上記問題点の対策になり得るものとして
、基板上に多結晶シリコン膜を形成し、イオン打ち込み
によりこの多結晶シリコン膜内に不純物を注入し、その
後の熱処理で該不純物を基板に拡散(固相拡散)させる
方法がある。この方法によれば、拡散領域を精度良(然
もその深さを■の方法よりも浅く形成することが容易で
ある。In method (2), a polycrystalline silicon film is formed on the substrate, impurities are implanted into the polycrystalline silicon film by ion implantation, and the impurities are removed by subsequent heat treatment. There is a method of diffusing it onto a substrate (solid-phase diffusion). According to this method, it is easier to form the diffusion region with good precision (and its depth is shallower than in method (2)).
しかしながらこの方法は、多結晶シリコン膜を基板に対
し選択的に除去することが難しいために、拡販源とした
多結晶シリコン膜をそのまま残して使用せざるを得ない
という問題点がある。However, this method has the problem that it is difficult to selectively remove the polycrystalline silicon film with respect to the substrate, so the polycrystalline silicon film used as a source of sales must be left as is.
なお、■における他の方法として、不純物ガスを拡散源
にする方法や、成長時に不純物を含有させた膜(例えば
PSG膜)を固相拡散の拡散源にする方法があるが、こ
れらは何れも精度や分布の面で■の方法に劣り、精度を
要求される高集積半導体装置の拡散領域の形成にはほと
んど用いられていない。Other methods for (2) include using an impurity gas as a diffusion source and using a film containing impurities during growth (for example, a PSG film) as a diffusion source for solid-phase diffusion, but none of these methods work. This method is inferior to method (2) in terms of precision and distribution, and is hardly used for forming diffusion regions in highly integrated semiconductor devices that require precision.
以上のことから、本発明は、半導体装置の製造方法、特
に、半導体基板の表面部に不純物拡散領域を形成する方
法において、固相拡散源とする多結晶シリコン膜を拡散
後に残さざるを得ないといったような制約なしに、浅い
拡散領域を精度良く形成し得るようにす名ことを目的と
する。From the above, the present invention provides a method for manufacturing a semiconductor device, particularly a method for forming an impurity diffusion region on the surface of a semiconductor substrate, in which a polycrystalline silicon film serving as a solid phase diffusion source must be left after diffusion. The purpose of this invention is to enable formation of shallow diffusion regions with high precision without such constraints.
上記目的は、半導体基板上に多結晶炭素膜を形成し、イ
オン打ち込みにより該炭素nり内に不純物を注入する工
程と、熱処理により該炭素膜中の該不純物を該基板に拡
散させる工程とを有して、該基板に不純物拡散領域を形
成する本発明の製造方法によって達成される。The above purpose is to form a polycrystalline carbon film on a semiconductor substrate, to inject impurities into the carbon layer by ion implantation, and to diffuse the impurities in the carbon film into the substrate by heat treatment. This is achieved by the manufacturing method of the present invention in which an impurity diffusion region is formed in the substrate.
本方法は、多結晶シリコン膜を固相拡散源とする先に述
べた方法の多結晶シリコン膜を多結晶炭素j漠に替えた
ものである。そしてこの炭素膜は、それが多結晶である
ことから多結晶シリコン膜と同様な固相拡散源となり得
て、然も、酸化により基板に対し選択的に除去すること
が容易である。In this method, the polycrystalline silicon film is replaced with polycrystalline carbon in the previously described method in which a polycrystalline silicon film is used as a solid-phase diffusion source. Since this carbon film is polycrystalline, it can serve as a solid phase diffusion source similar to a polycrystalline silicon film, and can be easily removed selectively with respect to the substrate by oxidation.
即ら、第1図(a)〜(C)の不純物濃度分布図は、本
方法による拡rPI LR域影形成原理を説明するもの
で、縦軸は不純物濃度(logスケール)、検軸は深さ
方向の距離、Aは多結晶炭素膜、Bは半導体基板、Cは
不純物拡散領域、であり、(a)はイオン打ち込みを行
った状態、(b)は熱処理を行った状態、(C)は熱処
理後に炭素膜を除去した状態、を示す。That is, the impurity concentration distribution diagrams in Figures 1(a) to (C) explain the principle of forming an enlarged rPI LR region by this method, where the vertical axis is the impurity concentration (log scale) and the axis of detection is the depth. The distance in the horizontal direction, A is the polycrystalline carbon film, B is the semiconductor substrate, C is the impurity diffusion region, (a) is the state after ion implantation, (b) is the state after heat treatment, (C) shows the state in which the carbon film has been removed after heat treatment.
(a)の状態では、不純物は炭素膜A内にあって基板B
に入っていない。このようにするのは、炭素l1uAの
厚さを例えば2000人程度以上にし、イオン打ち込み
の加速エネルギーを適宜にすることにより容易に実現で
きる。In the state of (a), impurities are in the carbon film A and in the substrate B.
It's not included. This can be easily achieved by making the thickness of the carbon l1uA about 2,000 or more, for example, and adjusting the acceleration energy of ion implantation appropriately.
炭素膜Aは、微細結晶で構成された多結晶であるために
熱処理による内部での不純物拡散が速いので、炭素膜A
中の不純物は、熱処理により、速やかに炭素膜Aと基板
Bの界面に達し、炭素膜Aを固相拡散源として基板Bに
拡散してら)のように拡散領域Cを形成する。拡散領域
Cの深さは、イオン打ち込みの炭素膜Aに対する濃度及
び熱処理条件の選定によって加減でき、然も、イオン打
ち込みを均一に行うことができることから分布ばらつき
の少ないものとなる。Since carbon film A is a polycrystalline structure composed of microcrystals, impurities diffuse quickly inside the carbon film A due to heat treatment.
Due to the heat treatment, the impurities therein quickly reach the interface between the carbon film A and the substrate B, and diffuse into the substrate B using the carbon film A as a solid-phase diffusion source, forming a diffusion region C as shown in FIG. The depth of the diffusion region C can be adjusted by selecting the concentration of ion implantation into the carbon film A and the heat treatment conditions, and since the ion implantation can be performed uniformly, there is little distribution variation.
(C)の状態にする炭素膜への除去は、酸化(C+oz
=CO□)によって基板Bに対し選択的に且つ基板Bの
表面を荒らすことなく容易に可能である。このことが、
多結晶シリコン膜を固相拡散源とする先に述べた方法と
大きく異なる点である。The removal from the carbon film to the state (C) involves oxidation (C+oz
=CO□) can be easily performed selectively to the substrate B and without roughening the surface of the substrate B. This means that
This method differs greatly from the previously described method in which a polycrystalline silicon film is used as a solid-phase diffusion source.
以上ののことから、本方法によれば、先に述べた制約な
しに浅い拡散領域を精度良く形成するとこが可能となる
。From the above, according to the present method, it is possible to form a shallow diffusion region with high precision without the above-mentioned restrictions.
以下本発明の一実施例について第2図(a)〜(e)の
工程順側断面図を用いて説明する。An embodiment of the present invention will be described below with reference to step-by-step side sectional views of FIGS. 2(a) to 2(e).
この実施例は、本発明をnチャネルMO5FETに適用
した場合のものである。即ち、第2図において、先ず(
a)を参照して、通常の方法により、p−St基板1上
に、厚さ4000人のStO□フィールド絶8i膜2、
ゲート絶縁膜を介在させた厚さ3000人の多結晶Si
ゲート電極3、を形成する。This embodiment is a case where the present invention is applied to an n-channel MO5FET. That is, in Fig. 2, first (
Referring to a), a 4000-thick StO□ field isolation 8i film 2,
3000mm thick polycrystalline Si with gate insulating film interposed
A gate electrode 3 is formed.
次いで(b)を参照して、その上の全面に、炭化水素(
例えば、CHa 、Cz Hb 、C3Hll、C2H
,、C,H,、、Cz H2、など)の熱分解によるC
VD法により、厚さ3000人の多結晶炭素膜4を形成
し、As”イオンを、加速エネルギー100KeV、ド
ーズ14 Xl013/cnl、で打ち込む。これによ
り、Asは、炭素膜4の表面から深さ約520人、標準
偏差約130人のガウス分布となる。Next, referring to (b), a hydrocarbon (
For example, CHa, Cz Hb, C3Hll, C2H
, , C, H, , Cz H2, etc.) by thermal decomposition of
A polycrystalline carbon film 4 with a thickness of 3000 μm is formed by the VD method, and As'' ions are implanted at an acceleration energy of 100 KeV and a dose of 14 It is a Gaussian distribution with about 520 people and a standard deviation of about 130 people.
次いで(C)を参照して、窒素雰囲気で、850°C3
lO分の熱処理を加えて、炭素膜4中のAsを基板1及
びゲート電極3に拡散させる。これにより、基FiIに
不純物拡散領域であるソース/ドレイン領域5が深さ約
1000人に形成される。Then, referring to (C), heat at 850°C3 in a nitrogen atmosphere.
Heat treatment for 1O is applied to diffuse As in the carbon film 4 into the substrate 1 and the gate electrode 3. As a result, source/drain regions 5, which are impurity diffusion regions, are formed in the FiI base to a depth of approximately 1000 nm.
次いで(d)を参照して、加熱した濃硫酸と過酸化水素
の混合液により炭素膜4を除去する。炭素膜4は、下地
の表面を荒らすことなく選択的に除去される。Next, referring to (d), the carbon film 4 is removed using a heated mixed solution of concentrated sulfuric acid and hydrogen peroxide. The carbon film 4 is selectively removed without roughening the underlying surface.
次いで(e)を参照して、通常の方法により、層間絶縁
膜6やAt電極7を形成してFETを完成させる。Next, referring to (e), an interlayer insulating film 6 and an At electrode 7 are formed by a conventional method to complete the FET.
このようなFETの製造において、従来は、ソース/ド
レイン領域5の形成に直接のイオン打ち込みを行ってい
るが、深さを約1000人にすることは、この従来方法
で実現することが困難であり、実施例で述べた本発明の
方法によって可能となっている。然も、本発明の方法に
よれば、先に述べたように、イオン打ち込みや熱処理の
条件を適宜に選定することによりソース/ドレイン領域
5の深さを更に浅くすることも可能である。そしてこの
ことは、FETの一層の微細化を容易にさせる。Conventionally, in the manufacture of such FETs, direct ion implantation has been used to form the source/drain regions 5, but it is difficult to achieve a depth of about 1000 using this conventional method. This is made possible by the method of the present invention described in the Examples. However, according to the method of the present invention, the depth of the source/drain region 5 can be made even shallower by appropriately selecting the conditions for ion implantation and heat treatment, as described above. This facilitates further miniaturization of the FET.
上記実施例はSi基板に形成するFETを例にとった場
合であるが、本発明は他の素子例えばバイポーラトラン
ジスクなどにも適用し得るものであり、更に、固相拡j
1に源とする多結晶炭素膜がSiに限らず他の半導体に
対しても下地を荒らすことなく選択的に除去し得ること
から、本発明の適用によって従来の半導体素子の新たな
展開を期待することができる。Although the above embodiment takes an example of an FET formed on a Si substrate, the present invention can also be applied to other devices such as bipolar transistors, and is further applicable to solid phase expansion transistors.
Since the polycrystalline carbon film sourced from No. 1 can be selectively removed not only from Si but also from other semiconductors without damaging the underlying layer, new developments in conventional semiconductor devices are expected by application of the present invention. can do.
〔発明の効果]
以上説明したように本発明の構成によれば、半導体装置
の製造方法、特に、半導体基板の表面部に不純物拡散領
域を形成する方法において、固相拡散源とする多結晶シ
リコン膜を拡散後に残さざるを得ないといったような制
約なしに、浅い拡散領域を精度良く形成し得るようにな
り、例えばFETの一層の微細化を容易にさせるなど、
従来の半導体素子の新たな展開を可能にさせる効果があ
る。[Effects of the Invention] As explained above, according to the configuration of the present invention, in a method for manufacturing a semiconductor device, particularly in a method for forming an impurity diffusion region in a surface portion of a semiconductor substrate, polycrystalline silicon as a solid phase diffusion source is used. It is now possible to form shallow diffusion regions with high accuracy without the constraints of leaving a film behind after diffusion, which facilitates further miniaturization of FETs, for example.
This has the effect of enabling new developments in conventional semiconductor devices.
第1図(a)〜(C)は本発明を説明する不純物濃度分
布図、
第2図(a)〜(e)は一実施例の工程順側断面図、で
ある。
図において、
Aは多結晶炭素膜、
Bは半導体基板、
Cは不純動域tPI M域、
lはSi基板、
4は多結晶炭素膜、
5はソース/ドレイン領域(不純物拡散領域)、である
。FIGS. 1(a) to (C) are impurity concentration distribution diagrams for explaining the present invention, and FIGS. 2(a) to (e) are side cross-sectional views of one embodiment in the order of steps. In the figure, A is a polycrystalline carbon film, B is a semiconductor substrate, C is an impurity motion region tPIM region, l is a Si substrate, 4 is a polycrystalline carbon film, and 5 is a source/drain region (impurity diffusion region). .
Claims (1)
により該炭素膜内に不純物を注入する工程と、熱処理に
より該炭素膜中の該不純物を該基板に拡散させる工程と
を有して、該基板に不純物拡散領域を形成することを特
徴とする半導体装置の製造方法。The process includes forming a polycrystalline carbon film on a semiconductor substrate, injecting impurities into the carbon film by ion implantation, and diffusing the impurities in the carbon film into the substrate by heat treatment. A method of manufacturing a semiconductor device, comprising forming an impurity diffusion region in a substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10088389A JPH02278818A (en) | 1989-04-20 | 1989-04-20 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10088389A JPH02278818A (en) | 1989-04-20 | 1989-04-20 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02278818A true JPH02278818A (en) | 1990-11-15 |
Family
ID=14285729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10088389A Pending JPH02278818A (en) | 1989-04-20 | 1989-04-20 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02278818A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5326991A (en) * | 1991-09-24 | 1994-07-05 | Rohm Co., Ltd. | Semiconductor device having silicon carbide grown layer on insulating layer and MOS device |
US5610411A (en) * | 1991-09-24 | 1997-03-11 | Rohm Co., Ltd. | Silicon carbide bipolar semiconductor device with birdsbeak isolation structure |
-
1989
- 1989-04-20 JP JP10088389A patent/JPH02278818A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5326991A (en) * | 1991-09-24 | 1994-07-05 | Rohm Co., Ltd. | Semiconductor device having silicon carbide grown layer on insulating layer and MOS device |
US5518953A (en) * | 1991-09-24 | 1996-05-21 | Rohm Co., Ltd. | Method for manufacturing semiconductor device having grown layer on insulating layer |
US5610411A (en) * | 1991-09-24 | 1997-03-11 | Rohm Co., Ltd. | Silicon carbide bipolar semiconductor device with birdsbeak isolation structure |
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