JPH0458524A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a source/drain diffusion layer to be shallow and to obtain a low-resistance element by a method wherein, out of crystal defects introduced by implanting ions into a semiconductor layer, a crystal defect which is restored comparatively easily is annealed and treated at a low temperature. CONSTITUTION:Ions are implanted into a substrate 17 a crystal state is disturbed; and an amorphous layer 4 is formed. Then, a crystal defect layer 5 and crystal defects 6 are caused in regions of the substrate 1 and a gate electrode 3 under the amorphous layer 4. After that, a low-temperature annealing treatment is executed. Then, in a state that crystals of the crystal defects whose crystals are easy to restore of the amorphous layer 4 and the crystal defects 6 under the amorphous layer 4 are restored, an active species injection layer 7 is formed. A high-temperature annealing treatment is executed; the crystals of the amorphous layer 4 are restored, and an active species is activated and a source/drain diffusion layer 8 is formed. Thereby, the source/drain diffusion layer 8 can be formed to be shallow, and a low-resistance element can be obtained.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method for manufacturing a semiconductor device, in which a shallow source/drain diffusion layer with good film quality after crystal recovery can be formed, and a low-resistance element can be obtained. The purpose of the present invention is to provide a manufacturing method, which includes a step of implanting ions into a semiconductor layer to disturb the crystalline state of the semiconductor layer, and a first annealing treatment at a relatively low temperature to eliminate crystal defects generated by the step. A step of crystallization recovery of easily recoverable crystal defects, a step of ion-implanting active species into the semiconductor layer in which the crystal state is disturbed, and a second annealing treatment at a higher temperature than the first annealing treatment temperature. The method is configured to include a step of recovering the crystal of the semiconductor layer whose crystal state has been disturbed and activating the active species.

(Industrial Application Field) The present invention can be applied to a method of manufacturing MO3 type transistors, etc., and is particularly applicable to forming a source/drain diffusion layer with good film quality after crystal recovery by annealing treatment. The present invention relates to a method for manufacturing a semiconductor device that can perform the following steps.

In recent years, with the miniaturization of MO3 type semiconductor devices, a technique for forming shallow diffusion layers such as source/drain is required. A technique for forming a shallow diffusion layer is to make the region into which active species will be implanted amorphous by implanting ions such as Si in the previous step, and then implant the active species into the amorphous region. Technology that suppresses microchanneling is effective.

[Conventional technology]

FIGS. 3(a) to 3(d) are diagrams illustrating a conventional method of manufacturing a semiconductor device. The illustrated example manufacturing method is applied to a MOS transistor manufacturing method. In FIG. 3, 31 is a substrate made of 81 etc., 32 is a gate oxide film made of SiO□ etc., 33 is a gate electrode made of poly-Si etc., 34 is an amorphous layer, and 35 is an active layer formed in the amorphous layer 34. A seed implantation layer, 36 a source/drain diffusion layer, and 37 a diffusion layer formed above the pole 33.

Next, the manufacturing method will be explained.

First, as shown in FIG. 3(a), the substrate 31 is oxidized, for example, by thermal oxidation to form a silicon oxide film, and
After forming a polysilicon film by depositing poly-Si on a silicon oxide film by the VD method, the polysilicon film and the silicon oxide film are selectively etched by, for example, wet etching to form a gate electrode 33 and a gate oxide film 32. At the same time, the substrate 31 is exposed.

Next, as shown in FIG. 3(b), using the Ge] electrode 33 as a mask, Si'(Ge' etc. may also be used) is applied to the substrate 31.
An amorphous layer 34 is formed by ion implantation. At this time, an amorphous layer 34 is also formed on the gate electrode 33.

Next, as shown in FIG. 3(C), an active species B" (may be BF2", etc.) is ion-implanted into the amorphous layer 34 using the gate electrode 33 as a mask to form an active species implanted layer 35. do.

Next, as shown in FIG.
The source/drain diffusion layer 3 is activated by activating the active species of
form 6. At this time, a diffusion layer 37 is also formed above the gate electrode 33.

Then, after forming a glabellar insulating film made of PSG or the like to cover the gate electrode 33 and forming a contact hole in the glabellar insulating film, the gate electrode 33 is inserted through the contact hole.
By forming a wiring layer made of A/2 or the like so as to make contact with the source/drain diffusion layer 36, a semiconductor device can be obtained.

In the conventional manufacturing method described above, the amorphous layer 3 is formed by injecting Si into the substrate 31 in advance to make it amorphous.
Since the active species injection layer 35 is formed by injecting B as an active species into the amorphous layer 34, the active species injection layer 35 is formed shallower than when the active species injection layer 35 is not formed within the amorphous layer 34. be able to. After that, a high temperature annealing treatment is performed to activate the active species and recover the crystals of the amorphous layer 34, so that the shallowly formed active species implantation layer 3
5 is activated to form the source/drain diffusion layer 36.
is formed shallowly, and the amorphous layer 34 is crystallized.

(Problems to be Solved by the Invention) However, in the conventional method for manufacturing a semiconductor device described above, as shown in FIG. When the amorphous layer 34 is formed, the substrate 31 under the amorphous layer 34
A crystal defect 41 is generated in the crystal, and B, which becomes an active species, is likely to combine with this crystal defect 41. Therefore, when high-temperature annealing is performed when forming the source/drain diffusion layer 36, the diffusion of active species becomes extremely fast, and the active species diffuse deep into the substrate 31, causing the source/train diffusion layer 36 to become shallow. There was a problem that it became difficult to form.

Further, as shown in FIG. 4(b), when the amorphous layer 34 is formed by ion-implanting Si into the substrate 31 with high energy and high dose, the substrate 31 under the amorphous layer 34
A wide crystal defect layer 42 containing many crystal defects is generated, and the interface between the crystal defect layer 42 and the amorphous layer 34 is disturbed. For this reason, even if high temperature annealing treatment for crystal recovery of the amorphous layer 34 is applied, there is a problem in that the film quality after crystal recovery deteriorates.

Therefore, the present invention aims to provide a source/source with good film quality after crystal recovery.
It is an object of the present invention to provide a method for manufacturing a semiconductor device that allows forming a shallow drain diffusion layer and obtains a low-resistance element.

[Means to solve the problem]

In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention includes a step of implanting ions into a semiconductor layer (including a substrate such as Si, a semiconductor layer, and a well) to disturb the crystal state of the semiconductor layer, and a step of disturbing the crystal state of the semiconductor layer. A step of performing a first annealing treatment to recover crystal defects that are easily recoverable among the crystal defects generated in the step, and a step of ion-implanting active species into the semiconductor layer in which the crystal state has been disturbed; The method includes a step of performing a second annealing treatment at a higher temperature than the first annealing treatment temperature to recover the crystal of the semiconductor layer whose crystal state has been disturbed and to activate the active species.

In the present invention, as will be described later, the first annealing treatment is preferably performed at a temperature lower than the temperature at which the semiconductor layer whose crystal state has been disturbed rapidly undergoes crystal recovery.

In the present invention, it is only necessary to disturb the crystalline state of the semiconductor layer by implanting ions into the semiconductor layer, but the crystalline state may be disturbed to an amorphous state, for example.

[Effect]

In the present invention, among the crystal defects introduced by the previous step of ion implantation, crystal defects that can be recovered relatively easily are recovered by annealing at a low temperature in advance, and then active species such as B are implanted. There is.

Specifically, as shown in Figure 2, when the crystal state after ion implantation was measured using Raman spectroscopy, it was found that when the crystal state was significantly disturbed, the Raman spectroscopic intensity became strong near 400°C, and there was a sudden change in the intensity. It can be seen that crystal recovery is occurring. In addition, although Raman spectroscopic intensity is sensitive to the crystal state, it is insensitive to the presence of crystal defects. It can be seen that only recovery occurs. The present invention is to perform annealing treatment at a temperature lower than the temperature at which rapid crystal recovery occurs. That is, such low-temperature annealing treatment can suppress film quality after crystal recovery and accelerated diffusion depending on these defects.

(Example〕 Hereinafter, the present invention will be explained based on the drawings.

FIG. 1 is a diagram illustrating an embodiment of a method for manufacturing a semiconductor device according to the present invention. The illustrated manufacturing method is applied to a method of manufacturing a MOS transistor. In these figures, 1 is a substrate made of Si or the like, 2 is a gate oxide film made of 5i02 or the like, 3 is a gate electrode made of polySi or the like, 4 is an amorphous layer, 5 is a crystal defect layer containing many crystal defects, and 6 is a crystal defect, 7 is an active species injection layer, 8 is a source/
Drain diffusion layer 9 is a diffusion layer.

Next, the manufacturing method will be explained.

First, as shown in FIG. 1(a), a substrate 1 is oxidized, for example, by thermal oxidation to form a silicon oxide film having a thickness of, for example, 200 nm, and poly-Si is deposited on the silicon oxide film by, for example, a CVD method. After forming a polysilicon film having a film thickness of, for example, 4,000, the polysilicon film and the silicon oxide film are selectively etched by, for example, wet etching to form a gate electrode 3 and a gate oxide film 2. expose.

Next, as shown in FIG. 1(b), using the gate electrode 3 as a mask, Ge"(Si" etc. may also be used), for example,
An amorphous layer 4 having a thickness of, for example, 500 layers is formed by implanting ions into the substrate 1 under conditions of KeV and ' 2 X l O' 4 C1n-2. At this time, the amorphous layer 4 is also formed on the gate electrode 3. In addition, since ions are implanted with high energy and high dose here, a crystal defect layer 5 containing many crystal defects is generated in the substrate 1 and gate electrode 3 under the amorphous layer 4, and the crystal defect layer 5 near the bottom of the crystal defect layer 5 is Crystal defects 6 occur in the substrate 1 and the gate electrode 3.

Next, as shown in FIG. 1(C), for example, 400゛C1
A low-temperature annealing treatment for 30 minutes is performed to recover the crystal defects of the crystal defect layer 5 that are easy to recover and the crystal defects generated in the substrate 1 below the crystal defect layer 5. At this time, crystal defects in the crystal defect layer 5 that are easy to crystallize are recovered and the thickness of the crystal defect layer 5 becomes thin, and most of the crystal defects generated in the substrate 1 under the crystal defect layer 5 are crystal recovered.

Next, as shown in FIG. 1(d), using the gate electrode 3 as a mask, BF, which becomes an active species, is 1
Ions are implanted into the amorphous layer 4 under the conditions of 0 KeV and 3 XIO"cm-2 to form an active species implanted layer 7 having a thickness of, for example, 50 ions.

Next, as shown in FIG. 1(e), for example, 800"C,
High-temperature annealing treatment for 30 minutes is performed to recover the crystals of the amorphous layer 4 and the crystal defect layer 5 and to activate the active species, thereby forming the source/drain diffusion layer 8. At this time, a diffusion layer 9 is also formed above the gate electrode 3.

Then, after forming a glabellar insulating film made of PSG or the like to cover the gate electrode 3 and forming a contact hole in the interlayer insulating film, contact is made with the gate electrode 3 and the source/drain diffusion layer 8 through the contact hole. Like Af
A semiconductor device can be obtained by forming a wiring layer consisting of the following.

That is, in the above embodiment, ions are first implanted into the substrate 1 to disturb the crystal state of the substrate 1 to form the amorphous layer 4, and a crystal defect layer 5 is formed in the region of the substrate 1 and the gate electrode 3 below the amorphous layer 4. After generating the crystal defects 6, a low-temperature annealing treatment is performed to recover the easily recoverable crystal defects and the crystal defects 6 in the crystal defect layer 5. Then, in a state where the crystal defects in the amorphous layer 4 that are easily recovered and the crystal defects 6 under the amorphous layer 6 are crystal recovered, active species are ion-implanted to form an active species implantation layer 7 in the amorphous layer 4. The source/drain diffusion layer 8 is then formed by performing high-temperature annealing treatment to recover the crystals of the amorphous layer 4 and activate the active species. Therefore, it is possible to form shallow source/drain diffusion layers 8 with better film quality after crystal recovery than in the case where crystal recovery is not performed by conventional low-temperature annealing treatment, and it is possible to obtain a low-resistance element.

Note that in the above embodiment, the source/source of the MOS transistor
Although the case of forming the drain diffusion layer 8 has been described,
The present invention is not limited to this, but can also be applied to the case of forming a base diffusion layer of a bipolar transistor.

〔Effect of the invention〕

According to the present invention, it is possible to form a shallow source/drain diffusion layer with good film quality after crystal recovery, and it is possible to obtain an element with low resistance.

[Brief explanation of drawings]

FIG. 1 is a diagram illustrating a manufacturing method of an embodiment of a semiconductor device manufacturing method according to the present invention, FIG. 2 is a diagram illustrating details of the present invention, and FIG. 3 is a diagram illustrating a conventional manufacturing method. 4 are diagrams for explaining the problems of the conventional example. 1...Substrate, 3...Gate electrode, 4...Amorphous layer, 5...Crystal defect layer, 6...Crystal defect, 7... Active species injection layer, 8... Source/drain diffusion layer. Figure 1 to explain the manufacturing method of one embodiment

Claims (2)

[Claims] (1) Ion implantation into the semiconductor layer (1)
), a step of performing a first annealing treatment at a relatively low temperature to recover crystal defects that are easy to recover among the crystal defects generated in the step, and A process of ion-implanting active species into the semiconductor layer (1), and performing a second annealing treatment at a higher temperature than the first annealing treatment temperature to recover the crystalline state of the semiconductor layer (1). and activating the active species. (2) The semiconductor according to claim 1, wherein the first annealing treatment is performed by selecting a temperature lower than a temperature at which the semiconductor layer (1) whose crystal state is disturbed rapidly undergoes crystal recovery. Method of manufacturing the device.