JPH04209524A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a deeper junction layer in a semiconductor substrate at a low temperature and in a short time by a method wherein the surface of a semiconductor-substrate material is formed as an amorphous layer or a crystal layer corresponding to it, a defect is formed and, after that, impurities are ion-implanted. CONSTITUTION:Ion seeds 2 which do not contribute toward activating a semiconductor substrate 1 are ion-implanted into the substrate 1; an amorphous layer 3 or a layer corresponding to it is formed on the surface of the substrate 1. Then, impurities 4, of boron or phosphorus, which contribute toward activating the substrate 1 are implanted; the substrate 1 is heat-treated; the impurities 4 are enhanced and diffused into the substrate 1; the layer 3 or the layer corresponding to it on the surface is etched and removed. That is to say, the impurities 4 which do not contribute toward activating the substrate 1 are implanted into the surface; its crystallinity is disturbed; a defect layer is formed; the impurities 4 are ion-implanted; the substrate is heat- treated; the enhanced diffusion of the impurities 4 is caused by the defect on the surface; a deep diffusion layer 5 is formed. Since the defect is left on the surface of the substrate 1 in this case, the defect layer is removed. Thereby, the crystallinity on the surface becomes good, and it is possible to form the deep diffusion layer easily by a short-time heat treatment at a low temperature.

Description

[Detailed description of the invention]

[00011

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to well formation for a CMOS device. [00021 Among MOS devices, CMO3 is widely used because of its very low power consumption, fast operation speed, relatively high resistance to noise, TTL compatibility, and easy low-voltage operation. [0003] However, the manufacturing process is complicated and takes a long time. In particular, in the well formation of nMOSMOS transistors, heat treatment at a high temperature of 1,200°C for a long time is required, and from the viewpoint of throughput and low-temperature process, it is important for future device advancement. , improvements are needed in this regard. [0004] FIG. 5 is an explanatory diagram of a conventional example. In the figure, 16 is a silicon (Si) substrate, 17 is a well, and 18 is a silicon (Si) substrate.
1 is a field silicon dioxide (SiO2) film, 19 is a gate 5i02 film, 20 is a gate electrode, and 21 is a source/drain diffusion layer. [00051] As shown in FIG. 5, the regions that require a diffusion process are the diffusion layers that constitute the source and drain of the MOS transistor, including the p-type diffusion layer for the n-channel transistor. both the N-layer and the n-layer for n-channel transistors. [00061 If the substrate is n-type, a p-type well layer is required, so a deep p-type diffusion layer is formed. [0007]

Problems to be Solved by the Invention Formation of a deep diffusion layer such as a p-well in ICMO3 is performed by a high-temperature, long-time heat treatment process. [0008] However, in the production of highly integrated and miniaturized semiconductor devices, processing steps are becoming lower in temperature. Ru. [00091] An object of the present invention is to obtain a method of forming a deep bonding layer in a semiconductor substrate using an ion implantation method. [00101] [Means for Solving the Problems] If the surface of a semiconductor substrate material is made amorphous or a crystalline layer similar thereto and defects are formed and then ion implantation of impurities is performed, the defects will be replaced by the implanted impurities in the subsequent heat treatment process. This causes accelerated diffusion of , and the resulting diffusion layer becomes deeper. [00111 The formed defect is 1 point from the semiconductor substrate surface.
．． It exists in the area below 0OOA. This defect is
Since it can be removed by etching after heat treatment, a semiconductor substrate surface with good crystallinity free of defect layers can be obtained in the first step. [0012] As described above, in the second aspect of the present invention, a defective layer is deliberately created on the surface of a semiconductor substrate to cause accelerated diffusion of implanted impurities, and then the defective layer remaining on the surface of the semiconductor substrate is removed by etching. [0013] That is, 9 objects of the present invention are 1. As shown in FIG. Step 3 of forming a layer or a layer similar thereto; Step 2: As shown in FIG.
A step of heat-treating the semiconductor substrate 1 to accelerate diffusion of the impurity 4 into the semiconductor substrate 1, and then removing the amorphous layer 3 or a similar layer on the surface of the semiconductor substrate 1 as shown in FIG. 1(c). This is achieved by including a step of removing by etching. [0014] As described above, in the second aspect of the present invention, an impurity that does not contribute to activation is implanted into the surface of a semiconductor substrate, the crystallinity is disturbed to form a defect layer, and the impurity is ion-implanted. [0015] Through subsequent heat treatment, surface defects are removed by enhanced diffusion of impurities.
Transition Diffusi. n) is caused and a deep diffusion layer is formed. In this case, since defects remain on the surface of the semiconductor substrate, by removing these defect layers, a surface with good crystallinity can be obtained. [0016] By using this technique, it becomes possible to easily form a deep diffusion layer by heat treatment at a lower temperature and for a shorter time than conventionally. [0017]

Embodiment FIG. 2 is a schematic cross-sectional view of the steps of an embodiment of the present invention. FIG. 31 FIG. 4 is a profile in the depth direction of boron and phosphorus ion-implanted into the 81 substrate. [0018] In the figure, 6 is a substrate, 7 is Si-, 8 is a pre-amorphous layer, 9 is boron fluoride BF2-, 1
0 is a resist film, 11 is a diffusion layer, 12 is a field Si
n, film, 13 is gate 5i (l film, 14 is gate electrode,
15 is a source/drain diffusion layer. (00191 Introducing defects on the surface of a semiconductor substrate causes accelerated diffusion of boron or phosphorus impurities that contribute to activation.7 A method of forming a deep diffusion layer at low temperature and in a short time is applied to the formation of 0MO8 wells. An example is shown in FIG.
100) Si” 7 was deposited on the surface of a 10 Ωcm Si substrate 6 by ion implantation at an accelerating voltage of 40 keV.
The implantation is performed at a dose of 2xlO"/cm-2. The implanted Si" 7 forms a pre-amorphous layer 8 having a depth of about 450 Å as a defective layer on the surface of the S substrate 6. [0021] Next, as shown in FIG. 2B, boron fluoride (BFz 4 )9, acceleration voltage 10 keV,
When implanted at a dose of 3xlO”/cm-2,
The implanted BF2''9 causes a depth of 6 in the Si substrate 6.
An impurity implantation layer of about 00A is formed. [0022] Subsequently, in a nitrogen (N2) gas atmosphere. After heat treatment at 800℃ for 30 minutes, a deep 1,800A
A diffusion layer 11 of about 100 mL is formed, and this layer becomes an n-well. Thereafter, as shown in FIG. 2C, the surface of the Si substrate 7 is wet-etched to a depth of about 100 A using hydrofluoric nitric acid to remove the pre-amorphous layer 8. [0023] Thereafter, as shown in FIG. 2(d), a field 5iOz film 12 is formed by nine normal steps, and then a source/drain diffusion layer 15. is formed in the well as shown in FIG. 2(e). 0MO8 is completed by forming gate 5i (h film 13, gate electrode 142, cover insulating film, source/train electrode, etc. not shown). [0024] In FIG. The data on the occurrence of ion implantation are shown by comparing the results obtained under the above ion implantation conditions with those of the conventional example. In this figure, Si
This is a profile of boron in the depth direction after ion implantation, making the surface a pre-amorphous layer, and applying heat treatment, showing its behavior. [0025] The measurement is performed using SIMS analysis (Secondr
y Ion MassSpec trome try)
This figure shows the depth profile of boron ions implanted into a Si substrate. The distribution of boron with and without Si implantation is shown in FIG. In the sample in which Si ° implantation was performed before BF2 °F2 and the crystallinity of the Si substrate surface was disturbed, the defects formed on the 9 surface caused accelerated diffusion of boron, and compared with the sample without Si implantation. , the diffusion layer is formed deeply. [0026] Again. It can be seen that once accelerated diffusion is induced, diffusion will not proceed at a higher heat treatment temperature. Next, as a second example, the formation of an n-well will be explained. As shown in FIG. 2(a), a p-type (10
0) On the surface of a Si substrate 6 of 10ΩCm by ion implantation. Si-7, acceleration voltage 40keV, dose amount 2xl
The implantation is carried out under the condition of O''/'cm-'.The implanted Si
-7, the depth of 450 is a defect layer on the surface of the Si base 16.
A pre-amorphous layer 8 of approximately A is formed. [0027] Next, as shown in FIG. 2(b), phosphorus ions (P) are implanted into the well formation region of the Si substrate 6 using the 6,000-layer thick resist film 10 as a mask. When p'9' is implanted under the conditions of an accelerating voltage of 4 key and a dose of 3xlO'1 cm-2, an impurity implanted layer with a depth of about 700 A is formed in the Si substrate 6 by the implanted p'9'. [0028] Subsequently, in a nitrogen (N2) gas atmosphere. After heat treatment at 800℃ for 30 minutes, a deep 1.500
A diffusion layer 11 of approximately A size is formed, and this layer becomes an n-well. Thereafter, as shown in FIG. 2(c), the pre-amorphous layer 8 is removed by wet-etching the surface of the Si substrate 7 by approximately 100% using hydrofluoric nitric acid. [0029] Thereafter, as shown in FIG. 2(d), a field SiO2 film 12 is formed by normal steps, and then a source/drain diffusion layer 15 is formed in the well as shown in FIG. 2(e). Gate SiO2 film 13. Gate electrode 1
47 A cover insulating film, source/train electrodes, etc. (not shown) are formed to complete 0MO8. [00301 FIG. 4 shows data on the occurrence of accelerated diffusion by introducing defects into the 9 surface as in FIG. 3, based on the results obtained under the above ion implantation conditions. The distribution of phosphorus with and without Si injection is shown in Figure 2. In the sample in which the crystallinity of the surface of the Si substrate was disturbed by performing Si − implantation before p° implantation, the defects formed on one surface caused accelerated diffusion of boron, and compared to the sample without Si + implantation. , the diffusion layer is formed deeply. [00311 From the above two results, by forming a slight defect layer on the surface of the Si substrate, accelerated diffusion of boron and phosphorus can occur simply by applying low-temperature heat treatment, and a deep diffusion layer can be formed. I understand. [0032]

[Effects of the Invention] As explained above, according to the present invention. In order to obtain a deep diffusion layer, long-term and high-temperature heat treatment was previously required, but now it is possible to form a deeper diffusion layer at low temperatures and in a short time, resulting in highly integrated and miniaturized technology. It greatly contributes to the development of semiconductor devices.

[Brief explanation of the drawing]

[Figure 1] Diagram explaining the principle of the present invention

[Fig. 2] Schematic sectional view of the process order of one embodiment of the present invention

[Figure 3]
Profile of boron ion-implanted into a Si substrate in the depth direction (profile [Figure 4] Profile of phosphorus ion-implanted into a Si substrate in the depth direction [file [Figure 5] Explanation of conventional example [Explanation of symbols] 1 Semiconductor Substrate 2 Ion species 3 Amorphous layer 4 Impurity 5 Diffusion layer 6 Substrate 7 5i=8 Blair amorphous layer 8F2- 9゛p- 10 Resist film 11 Diffusion layer 12 Field SiO: film 13 Gate SiO2 film 14 Gate electrode 15 Source/drain diffusion layer

[Figure 3]

Claims (5)

[Claims] 1. Implanting an ion species (2) that does not contribute to the activation of the semiconductor substrate (1) into the semiconductor substrate (1),
A step of forming an amorphous layer (3) or a layer similar thereto on the surface of the semiconductor substrate (1), and then a step of forming an impurity of boron or phosphorus that contributes to the activation of the semiconductor substrate (1).
4) and heat-treating the semiconductor substrate (1) to accelerate diffusion of the impurity (4) into the semiconductor substrate (1); 1. A method for manufacturing a semiconductor device, comprising the step of etching away a corresponding layer. 2. The method of manufacturing a semiconductor device according to claim 1, wherein silicon or germanium is used as the ion species (2). 3. The method of manufacturing a semiconductor device according to claim 1, wherein an inert gas is used as the ion species (2). 4. A boron compound as the impurity (4),
Alternatively, a phosphorus compound is used.
A method of manufacturing the semiconductor device described above. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment is performed at 800 to 900°C.