JPS6118351B2 - - Google Patents

Info

Publication number
JPS6118351B2
JPS6118351B2 JP7660676A JP7660676A JPS6118351B2 JP S6118351 B2 JPS6118351 B2 JP S6118351B2 JP 7660676 A JP7660676 A JP 7660676A JP 7660676 A JP7660676 A JP 7660676A JP S6118351 B2 JPS6118351 B2 JP S6118351B2
Authority
JP
Japan
Prior art keywords
substrate
source
epitaxial layer
contact
heat sink
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7660676A
Other languages
English (en)
Other versions
JPS5214385A (en
Inventor
Richaado Detsukaa Debitsudo
Oomori Masahiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Varian Medical Systems Inc
Original Assignee
Varian Associates Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Varian Associates Inc filed Critical Varian Associates Inc
Publication of JPS5214385A publication Critical patent/JPS5214385A/ja
Publication of JPS6118351B2 publication Critical patent/JPS6118351B2/ja
Granted legal-status Critical Current

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Classifications

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    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
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Description

【発明の詳細な説明】 〔本発明の技術分野〕 本発明はトランジスタに関し、更に詳細にはマ
イクロ波周波数での低雑音化のための、カリウム
ヒ素電界効果トランジスタ（FET）の構造であ
つて、その導線のインダクタンスを最小ならしめ
たところの新規な構造に関する。
〔従来技術の説明〕
MESFET（金属・半導体FET）型の電界効果
トランジスタは一般的に半導体材料の本体を含
み、その少なくとも上部層はエピタキシヤル成長
させられ、その上面には複数の伝導性の電極、一
般的にはソース電極とゲート電極とドレイン電極
が形成された。ソースとドレインの両電極の間に
空乏領域を形成するようにソースとドレインの両
電極は一般的にエピタキシヤル層の表面へのオー
ム接触体であり、一方ゲート電極は一般的に整流
接触体、つまりシヨツトキー障壁接触体となるよ
うにされた。それによつてゲートのバイアスを変
化させることによつて空乏領域内のキヤリアを制
御することが可能となり、またそれ故ソース・ド
レイン電流とFETの利得を制御することが可能
となつた。
表面電極（ソース・ゲート及びドレイン）への
接触体（コンタクト）は通常、チツプ上の電極か
らのびており、チツプからはなれていて隣接の回
路に取付けられたコンタクト・ランドに達してい
るワイヤ導線を使用することによつて行われて来
た。そのFETを接触させるこのような方法には
幾つかの欠点があつた。
第１に、電極からコンタクト・ランドにのびて
いるワイヤ導線はマイクロ波周波数でかなりのイ
ンダクタンスと抵抗を持つている。周知のよう
に、そのような直列のインダクタンスと抵抗はマ
イクロ波能動素子と共同して能動素子の雑音指数
を上昇させると共に最高動作周波数、即ち使用可
能な利得が能動素子から得ることのできる最高周
波数、を制限する。
従来装置の他の欠点は、細いワイヤ導線が熱を
十分に伝達せず、しかもデバイス自体の実際の半
導体本体が良熱伝導体ではないという事実によつ
て、ソース電極の近くで発生した熱がデバイスか
ら容易に逃げることができないことである。従つ
てデバイスの温度上昇をデバイスで放散された電
力で割つた量で定義される熱抵抗は高く、一般的
におよそ50℃／Ｗである。そのような大きな熱抵
抗はデバイスの無線周波電力能力を著しく制限す
る。なぜならデバイスで扱うことのできる電力量
はそのデバイスの最高安全動作温度で制限される
からである。周知のように、そのデバイスの熱抵
抗を減少させた場合、そのデバイスで扱うことの
できる電力量が増加すると共に、その最高安全温
度においてもなお動作させることができるであろ
う。
デバイスの上部にワイヤ導線を必要とすること
によつて生ずる他の欠点は、そのようなワイヤ導
線とそれらが取付けられる各々の電極を、導線が
互いに接触しないように取付けなければならない
ということである。もしそのような導線の１本あ
るいはそれ以上を除去することができれば、残り
のワイヤ導線と各電極を取付けるにあたつて余分
なスペースを得ることができ、それによつて短か
い導線を使用することができ、従つて導線のイン
ダクタンスと抵抗を低下させることができるだけ
でなく、上部の電極の形状あるいは構造とそれに
付随するデバイスの性能を最適化するためそのよ
うな形状を調節あるいは変化させることができ
る。
〔本発明の目的〕
従つて本発明の目的は(1)改良された新規な電界
効果トランジスタを提供すること、(2)導線のイン
ダクタンスと抵抗が小さい電界効果トランジスタ
を提供すること、(3)熱抵抗の非常に小さな電界効
果トランジスタを提供すること、(4)１本あるいは
それ以上のワイヤ接触導線を除去することができ
る電界効果トランジスタを提供し、それによつて
電極の形状と他のワイヤ導線の自由度を増加せし
めること、(5)雑音指数の小さな電界効果トランジ
スタを提供すること、(6)最高動作周波数の高い電
界効果トランジスタを提供することである。本発
明の他の目的及び利点は次の説明の考察から明ら
かとなるであろう。
〔実施例の説明〕
本発明に従うデバイスを製造するため、105オ
ーム・センチメートル以上の抵抗率を有する例え
ばGaAsのようなほぼ真性の高抵抗−族材料
より成るウエーハあるいは基板が準備される。そ
のような基板の直径はおよそ25cm、厚さはおよそ
0.25mmでよい。そのような基板のほんの一部分が
第１図にて参照数字10で示されており、そのよう
な一部分は１個のデバイスを保持するのに十分で
ある。
基板１０の上には、およそ1017個／立方センチ
メートルのドービング密度までＳあるいはSnで
ドープされたGaAsのｎ型のエピタキシヤル層１
２がおよそ3000オングストロームの厚さに成長さ
せられる。
基板１０、ソース電極１４、ゲート電極１６及
びドレイン電極１８の表面上の各〓トランジス
タ・サイト（site）〓には適当な金属が形成され
る。そのような諸電極は周知の蒸着とエツチング
技術によつて形成され、第３図に図示されている
ような形状を有する。既に述べた大きさの典型的
な基板には約1500組の電極が形成され、各組は
別々のFETを構成する。
次に基板の上面が取付具に装着、あるいは付着
され、そして周知の技術を用いて基板１０はデバ
イス全体がおよそ75ミクロンの厚さとなるまでそ
の底面から厚さをけずられる。
次に基板１０とエピタキシヤル層１２を貫通す
る穴（ホール）が基板の底面側からエツチングに
よつて各ソース電極１４の背後までうがたれる。
この作業は各ソース電極１４の下面が露出されて
基板の底面から到達可能な状態となるまで行われ
る。そのような穴は周知の写真食刻法によつてエ
ツチされる。即ち、マスクが基板の底面上に形成
され、穴がマスクにあけられ、基板がエツチ液に
浸される。するとエツチングが終了する前にエピ
タキシヤル層１２が破壊されるのに十分な速度で
基板１０とエピタキシヤル層１２の半導体材料が
エツチされる。しかしマスクあるいはソース電極
１４の金属はエツチされない。適当なエツチ液は
H2SO4：H2O2：H2Oであり、基板の底面の開口
の寸法はおよそ0.076×0.23mmの矩形であるべき
であり、基板の上面の開口はおよそ0.05×0.2mm
の寸法である。上面の開口は底面の開口よりわず
かに小さい。
穴が基板の上面までエツチされたとき、それら
の穴がソース電極の真下に来るように基板の底面
における穴のアラインメントは比較的精密である
べきである。そのような穴のアラインメントは市
販されている像重畳装置によつて行われるのが望
ましい。この装置を用いると、鏡によつて基板の
上面の像が基板の実際の上面と完全に整列した状
態で基板の底面上に投影される。あるいは、固定
の基準点からのソース電極の位置を測定し、かつ
基板の底面での対応する測定を行なうことによつ
てアラインメントを達成することもできる。
穴が基板を貫通してエツチングが終了した後、
数字20で指示されているように穴が金属でふさが
れて金属が基板の底面から基板全体に広がつてソ
ース電極１４に接触するようにされる。そのよう
な金属充填は標準的な蒸着あるいはめつきによつ
て行われる。それに適する金属は金である。この
金属は第２図に数字20で指示されているようにそ
れが各穴を完全に満たすように各穴に注入される
のが望ましい。ヒートシンクへの接触を容易にす
るため基板の底面全体にわたつてその金属の薄い
層を形成することもできる。
ソース接触体２０の形成の後、基板は第２図に
示されているように個々のFETチツプに分離さ
れる。各FETチツプはおよそ0.66×1.07mmの大き
さの矩形である。
次に各チツプは、第４図に全体が示されている
ヒートシングの２２に結合される。ヒートシング
２２は金めつきされた銅の直円柱であり、その直
径はおよそ1.3mmで厚さ（高さ）はおよそ3.8mmで
ある。ヒートシンク２２は金、ゲルマニウムはん
だ層２４によつてFETチツプに結合され得る。
その後ヒートシンク２２の表面の周囲部分がマ
イクロストリツプ回路ボード２５内の穴の下側に
結合される。回路ボード２５は金より成る上部伝
導層２８と下部伝導層３０を有するおよそ0.64mm
の厚さのアルミナより成る中間の絶縁層２６より
成る。下部伝導層３０は接地板であり、回路ボー
ド２５の底面全体にわたつて連続しているのが望
ましい。上部伝導層２８は回路ボード２５上に形
成された抵抗器、コンデンサ、導体を含むマイク
ロ波回路の導体、あるいは導体の一部を構成す
る。
下部伝導層３０はろう付けあるいは溶接によつ
てヒートシンク２２に伝導的に接合される。ゲー
ト電極１６はボンデイング・ワイヤ３２によつて
上部伝導層２８の一部に接続される。ドレイン電
極１８は別のボンデイング・ワイヤ３４によつて
回路伝導体２８′の別の部分に接続される。ボン
デイング・ワイヤ３２と３４は周知の熱圧着法あ
るいは超音波溶接技術によつて取付けられる。そ
のようなボンデイング・ワイヤは金より成り、お
よそ25ミクロンの直径を有する。
上部伝導層（回路伝導体）２８はワイヤ３２を
通してゲート電極１６に入力信号を送るための
FET用の入力回路を構成し、一方回路伝導体２
８′はワイヤ３４を通して出力信号を受ける出力
回路を構成する。ソース接触体２０とヒートシン
ク２２を介して接地板（下部伝導層）３０に接続
されているソース電極１４は共通接続体を構成す
る。
非常に小さなインダクタンスと非常に小さな抵
抗を有するソース接触体２０の使用によつてソー
ス電極１４に接続する直列のインダクタンスと抵
抗は従来のボンデイング・ワイヤが使用される場
合に比較して大幅に減少する。ソースの入力抵抗
とインダクタンスとそのような減少によつてＸバ
ンドとそれ以上の帯域での雑音指数が大幅に減少
すると共にトランジスタの最高動作周波数の上昇
を可能とする。
前述の事項より更に重要なことは、ソース接触
体２０がソース電極１４からヒートシンク２２に
達する非常に小さな熱インピーダンスの伝導路を
提供するという事実である。ソース電極で発生し
た熱は基板１０とエピタキシヤル層１２よりはる
かに小さな熱インピーダンスを有するソース接触
体２０を経てヒートシンク２２に速やかにしかも
効率的に伝達される。ソース接触体２０の使用に
よつてもたらされたCETの大幅に改善された熱
放散能力によつてFETの熱抵抗はおよそ１け
た、例えば約50℃／Ｗから約５℃／Ｗにまで減少
する。この改善によつて熱線周波数電力能力のお
よそ１けたあるいはそれ以上の大幅な増加が可能
となる。
またFETの上面にてボンデイング・ワイヤを
１本除去することによつて設計の幾何学的レイア
ウトが大幅に容易となり、導線を配線する自由度
の向上、及び導線の交差の必配なしに追加のトラ
ンジスタを平行にする能力とが得られる。
回路ボート２５及び１個あるいは複数のFET
チツプを含むデバイス全体は周知の方法で適当な
無線周波入力及び出力伝導体を有する伝導性筐体
（エンクロージヤ）あるいは空洞に取付けられ得
る。
前述の説明は多くの細部を含んでいるけれど
も、これらは本発明の範囲を限定するものではな
く、むしろ本発明の望ましい実施態様の一例示と
みなすべきである。前述の実施例に数多くの変更
が可能である。例えば、もし絶縁領域がチツプに
設けられているならば、ソース接触体２０をドレ
イン電極と、あるいはソース電極とドレイン電極
の両方に接続してもよい。チツプを添付図面にて
示したもとの異なる方法で実装してもよい。従つ
て本発明の範囲は前述の実施態様によつてではな
く、特許請求の範囲とその特許法上の均等物によ
つて決定されるべきである。
【図面の簡単な説明】
第１図は製造の中間状態にある本発明に従うデ
バイスの断面図、第２図はヒートシンクに取付け
られている完成されたデバイスの断面図、第３図
は第２図のデバイスの平面図、第４図はマイクロ
ストリツプ回路に結合されたヒートシンクを含む
デバイスの断面図である。 １０…基板、１２…エピタキシヤル層、１４…
ソース電極、１６…ゲート電極、１８…ドレイン
電極、２０…ソース接触体、２２…ヒートシン
ク、３２，３４…ボンデイング・ワイヤ。

Claims (1)

  1. 【特許請求の範囲】 １ 上面と下面とを有する、半導体材料がGaAs
    である本体； 該本体の前記上面に接触して設けられた、複数
    の、互いに離間した金属製の電極； 上面が前記電極のうちの１つの電極の下面に接
    触し、下面が前記本体の前記下面と同一平面内に
    ある金属製の接触体；及び 前記同一平面全体を覆つて形成された、前記接
    触体と同一の金属の薄い層； から構成され、 前記接触体は、前記本体の前記下面から前記本
    体を貫通し、前記１つの電極の前記下面まで伸び
    ており；かつ 前記接触体の前記下面が、前記接触体の前記上
    面より大きな面積を有している； ことを特徴とする電界効果トランジスタ。
JP7660676A 1975-06-30 1976-06-30 Microwave fet substrate penetrating electrode contactor Granted JPS5214385A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/591,690 US3986196A (en) 1975-06-30 1975-06-30 Through-substrate source contact for microwave FET

Publications (2)

Publication Number Publication Date
JPS5214385A JPS5214385A (en) 1977-02-03
JPS6118351B2 true JPS6118351B2 (ja) 1986-05-12

Family

ID=24367492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7660676A Granted JPS5214385A (en) 1975-06-30 1976-06-30 Microwave fet substrate penetrating electrode contactor

Country Status (6)

Country Link
US (1) US3986196A (ja)
JP (1) JPS5214385A (ja)
CA (1) CA1057411A (ja)
DE (1) DE2629203A1 (ja)
FR (1) FR2316742A1 (ja)
GB (1) GB1547463A (ja)

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* Cited by examiner, † Cited by third party
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JPH0325027Y2 (ja) * 1988-06-07 1991-05-30

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DE2629203A1 (de) 1977-02-03
FR2316742B1 (ja) 1982-10-15
JPS5214385A (en) 1977-02-03
GB1547463A (en) 1979-06-20
DE2629203C2 (ja) 1988-01-14
US3986196A (en) 1976-10-12
CA1057411A (en) 1979-06-26
FR2316742A1 (fr) 1977-01-28

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