IT8048031A0 - Perfezionamento nei dispositivi a semiconduttore ad effetto di campo - Google Patents
Perfezionamento nei dispositivi a semiconduttore ad effetto di campoInfo
- Publication number
- IT8048031A0 IT8048031A0 IT8048031A IT4803180A IT8048031A0 IT 8048031 A0 IT8048031 A0 IT 8048031A0 IT 8048031 A IT8048031 A IT 8048031A IT 4803180 A IT4803180 A IT 4803180A IT 8048031 A0 IT8048031 A0 IT 8048031A0
- Authority
- IT
- Italy
- Prior art keywords
- improvement
- field effect
- semiconductor devices
- effect semiconductor
- devices
- Prior art date
Links
- 230000005669 field effect Effects 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/147—Semiconductor insulating substrates
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
- H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L29/41725—Source or drain electrodes for field effect devices
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/05001—Internal layers
- H01L2224/05005—Structure
- H01L2224/05009—Bonding area integrally formed with a via connection of the semiconductor or solid-state body
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- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41758—Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
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- H01L2924/01004—Beryllium [Be]
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- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
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- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
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- H01L2924/1203—Rectifying Diode
- H01L2924/12032—Schottky diode
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- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
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- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
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- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
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- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US2842179A | 1979-04-09 | 1979-04-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
IT8048031A0 true IT8048031A0 (it) | 1980-02-28 |
Family
ID=21843361
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8048031A IT8048031A0 (it) | 1979-04-09 | 1980-02-28 | Perfezionamento nei dispositivi a semiconduttore ad effetto di campo |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS55140272A (it) |
DE (1) | DE3013196A1 (it) |
FR (1) | FR2454185A1 (it) |
GB (1) | GB2046514A (it) |
IT (1) | IT8048031A0 (it) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4531145A (en) * | 1980-08-04 | 1985-07-23 | Fine Particle Technology Corporation | Method of fabricating complex micro-circuit boards and substrates and substrate |
JPS5778655U (it) * | 1980-10-30 | 1982-05-15 | ||
FR2505094A1 (fr) * | 1981-04-29 | 1982-11-05 | Trt Telecom Radio Electr | Procede de realisation des circuits hyperfrequences |
FR2507409B1 (fr) * | 1981-06-03 | 1985-09-13 | Radiotechnique Compelec | Circuit hyperfrequence, notamment amplificateur a transistor a effet de champ |
FR2516311B1 (fr) * | 1981-11-06 | 1985-10-11 | Thomson Csf | Socle pour le montage d'une pastille semi-conductrice sur l'embase d'un boitier d'encapsulation, et procede de realisation de ce socle |
FR2554275B1 (fr) * | 1983-10-26 | 1986-09-05 | Radiotechnique Compelec | Dispositif de connexion pour un semi-conducteur de puissance |
FR2565030B1 (fr) * | 1984-05-25 | 1986-08-22 | Thomson Csf | Structure de metallisations de reprise de contacts d'un dispositif semi-conducteur et dispositif dote d'une telle structure |
IT1175541B (it) * | 1984-06-22 | 1987-07-01 | Telettra Lab Telefon | Procedimento per la connessione a terra di dispositivi planari e circuiti integrati e prodotti cosi' ottenuti |
US4970578A (en) * | 1987-05-01 | 1990-11-13 | Raytheon Company | Selective backside plating of GaAs monolithic microwave integrated circuits |
US4800420A (en) * | 1987-05-14 | 1989-01-24 | Hughes Aircraft Company | Two-terminal semiconductor diode arrangement |
DE3718684A1 (de) * | 1987-06-04 | 1988-12-22 | Licentia Gmbh | Halbleiterkoerper |
JPH0821595B2 (ja) * | 1987-07-28 | 1996-03-04 | 三菱電機株式会社 | 半導体装置 |
US5051811A (en) * | 1987-08-31 | 1991-09-24 | Texas Instruments Incorporated | Solder or brazing barrier |
US4925723A (en) * | 1988-09-29 | 1990-05-15 | Microwave Power, Inc. | Microwave integrated circuit substrate including metal filled via holes and method of manufacture |
DE3843787A1 (de) * | 1988-12-24 | 1990-07-05 | Standard Elektrik Lorenz Ag | Verfahren und leiterplatte zum montieren eines halbleiter-bauelements |
DE4135654A1 (de) * | 1991-10-29 | 2003-03-27 | Lockheed Corp | Dichtgepackte Verbindungsstruktur, die eine Abstandshalterstruktur und einen Zwischenraum enthält |
JPH06244216A (ja) * | 1992-12-21 | 1994-09-02 | Mitsubishi Electric Corp | Ipgトランジスタ及びその製造方法,並びに半導体集積回路装置及びその製造方法 |
US5703405A (en) * | 1993-03-15 | 1997-12-30 | Motorola, Inc. | Integrated circuit chip formed from processing two opposing surfaces of a wafer |
WO1996013062A1 (en) * | 1994-10-19 | 1996-05-02 | Ceram Incorporated | Apparatus and method of manufacturing stacked wafer array |
US6331722B1 (en) * | 1997-01-18 | 2001-12-18 | Semiconductor Energy Laboratory Co., Ltd. | Hybrid circuit and electronic device using same |
SE515158C2 (sv) | 1999-02-10 | 2001-06-18 | Ericsson Telefon Ab L M | Halvledaranordning med jordanslutning via en ej genomgående plugg |
EP1739736A1 (en) | 2005-06-30 | 2007-01-03 | Interuniversitair Microelektronica Centrum ( Imec) | Method of manufacturing a semiconductor device |
EP1693891B1 (en) * | 2005-01-31 | 2019-07-31 | IMEC vzw | Method of manufacturing a semiconductor device |
CN107980171B (zh) * | 2016-12-23 | 2022-06-24 | 苏州能讯高能半导体有限公司 | 半导体芯片、半导体晶圆及半导体晶圆的制造方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1524053A (fr) * | 1951-01-28 | 1968-05-10 | Telefunken Patent | Circuit à corps solides constitués par une masse semi-conductrice comprenant des composants actifs incorporés et par une couche isolante comprenant des composants passifs, ainsi que par des conducteurs rapportés |
FR1486855A (it) * | 1965-07-17 | 1967-10-05 | ||
DE1933731C3 (de) * | 1968-07-05 | 1982-03-25 | Honeywell Information Systems Italia S.p.A., Caluso, Torino | Verfahren zum Herstellen einer integrierten Halbleiterschaltung |
US3648131A (en) * | 1969-11-07 | 1972-03-07 | Ibm | Hourglass-shaped conductive connection through semiconductor structures |
US3986196A (en) * | 1975-06-30 | 1976-10-12 | Varian Associates | Through-substrate source contact for microwave FET |
-
1980
- 1980-02-28 IT IT8048031A patent/IT8048031A0/it unknown
- 1980-03-03 GB GB8007113A patent/GB2046514A/en not_active Withdrawn
- 1980-04-03 DE DE19803013196 patent/DE3013196A1/de not_active Withdrawn
- 1980-04-08 FR FR8007819A patent/FR2454185A1/fr not_active Withdrawn
- 1980-04-08 JP JP4614280A patent/JPS55140272A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
GB2046514A (en) | 1980-11-12 |
DE3013196A1 (de) | 1980-10-30 |
FR2454185A1 (fr) | 1980-11-07 |
JPS55140272A (en) | 1980-11-01 |
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