JPS61165172A - メモリアクセス制御方式 - Google Patents

メモリアクセス制御方式

Info

Publication number
JPS61165172A
JPS61165172A JP26232984A JP26232984A JPS61165172A JP S61165172 A JPS61165172 A JP S61165172A JP 26232984 A JP26232984 A JP 26232984A JP 26232984 A JP26232984 A JP 26232984A JP S61165172 A JPS61165172 A JP S61165172A
Authority
JP
Japan
Prior art keywords
access
address
storage
system storage
local storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26232984A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0211933B2 (enExample
Inventor
Kiyoshi Sudo
清 須藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP26232984A priority Critical patent/JPS61165172A/ja
Publication of JPS61165172A publication Critical patent/JPS61165172A/ja
Publication of JPH0211933B2 publication Critical patent/JPH0211933B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP26232984A 1984-12-11 1984-12-11 メモリアクセス制御方式 Granted JPS61165172A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26232984A JPS61165172A (ja) 1984-12-11 1984-12-11 メモリアクセス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26232984A JPS61165172A (ja) 1984-12-11 1984-12-11 メモリアクセス制御方式

Publications (2)

Publication Number Publication Date
JPS61165172A true JPS61165172A (ja) 1986-07-25
JPH0211933B2 JPH0211933B2 (enExample) 1990-03-16

Family

ID=17374256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26232984A Granted JPS61165172A (ja) 1984-12-11 1984-12-11 メモリアクセス制御方式

Country Status (1)

Country Link
JP (1) JPS61165172A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6418856A (en) * 1987-07-14 1989-01-23 Fujitsu Ltd Recognizing system for memory capacity
US5303498A (en) * 1989-02-02 1994-04-19 Kabushiki Kaisha Kobe Sekio Sho Fishing line

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6418856A (en) * 1987-07-14 1989-01-23 Fujitsu Ltd Recognizing system for memory capacity
US5303498A (en) * 1989-02-02 1994-04-19 Kabushiki Kaisha Kobe Sekio Sho Fishing line

Also Published As

Publication number Publication date
JPH0211933B2 (enExample) 1990-03-16

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