JPS58169958A - Misスタテイツク・ランダムアクセスメモリ - Google Patents
Misスタテイツク・ランダムアクセスメモリInfo
- Publication number
- JPS58169958A JPS58169958A JP57051152A JP5115282A JPS58169958A JP S58169958 A JPS58169958 A JP S58169958A JP 57051152 A JP57051152 A JP 57051152A JP 5115282 A JP5115282 A JP 5115282A JP S58169958 A JPS58169958 A JP S58169958A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- raised
- writing
- vcc
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57051152A JPS58169958A (ja) | 1982-03-31 | 1982-03-31 | Misスタテイツク・ランダムアクセスメモリ |
EP83301734A EP0090632B1 (en) | 1982-03-31 | 1983-03-28 | Static-type random-access memory device |
DE8383301734T DE3380235D1 (en) | 1982-03-31 | 1983-03-28 | Static-type random-access memory device |
US06/480,582 US4563754A (en) | 1982-03-31 | 1983-03-30 | Static-type random-access memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57051152A JPS58169958A (ja) | 1982-03-31 | 1982-03-31 | Misスタテイツク・ランダムアクセスメモリ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58169958A true JPS58169958A (ja) | 1983-10-06 |
JPS6237468B2 JPS6237468B2 (en, 2012) | 1987-08-12 |
Family
ID=12878841
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57051152A Granted JPS58169958A (ja) | 1982-03-31 | 1982-03-31 | Misスタテイツク・ランダムアクセスメモリ |
Country Status (4)
Country | Link |
---|---|
US (1) | US4563754A (en, 2012) |
EP (1) | EP0090632B1 (en, 2012) |
JP (1) | JPS58169958A (en, 2012) |
DE (1) | DE3380235D1 (en, 2012) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH056675A (ja) * | 1991-06-27 | 1993-01-14 | Nec Corp | スタテイツク型半導体メモリ装置 |
US5875133A (en) * | 1995-07-21 | 1999-02-23 | Seiko Epson Corporation | Semiconductor memory device and a method for stepping up its word lines |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5051959A (en) * | 1985-08-14 | 1991-09-24 | Fujitsu Limited | Complementary semiconductor memory device including cell access transistor and word line driving transistor having channels of different conductivity type |
JPS6238592A (ja) * | 1985-08-14 | 1987-02-19 | Fujitsu Ltd | 相補型メモリの行選択線駆動回路 |
JPS6286756U (en, 2012) * | 1985-11-20 | 1987-06-03 | ||
US4901280A (en) * | 1986-07-11 | 1990-02-13 | Texas Instruments Incorporated | Pull-up circuit for high impedance word lines |
JPS63104290A (ja) * | 1986-10-21 | 1988-05-09 | Nec Corp | 半導体記憶装置 |
US4769564A (en) * | 1987-05-15 | 1988-09-06 | Analog Devices, Inc. | Sense amplifier |
JP2654548B2 (ja) * | 1987-10-02 | 1997-09-17 | 株式会社日立製作所 | 半導体記憶装置 |
US5175826A (en) * | 1988-05-26 | 1992-12-29 | Ibm Corporation | Delayed cache write enable circuit for a dual bus microcomputer system with an 80386 and 82385 |
JPH0268796A (ja) * | 1988-09-02 | 1990-03-08 | Fujitsu Ltd | 半導体記憶装置 |
EP0426597B1 (en) * | 1989-10-30 | 1995-11-08 | International Business Machines Corporation | Bit decode scheme for memory arrays |
US5022010A (en) * | 1989-10-30 | 1991-06-04 | International Business Machines Corporation | Word decoder for a memory array |
JP3228759B2 (ja) * | 1990-01-24 | 2001-11-12 | セイコーエプソン株式会社 | 半導体記憶装置及びデータ処理装置 |
JPH0631256U (ja) * | 1992-09-24 | 1994-04-22 | アイホン株式会社 | フックスイッチ機構 |
JP3068389B2 (ja) * | 1993-09-29 | 2000-07-24 | 日本電気株式会社 | 半導体記憶装置 |
JP2980797B2 (ja) * | 1993-12-03 | 1999-11-22 | シャープ株式会社 | Mos型スタティックメモリ装置 |
US6034913A (en) * | 1997-09-19 | 2000-03-07 | Siemens Microelectronics, Inc. | Apparatus and method for high-speed wordline driving with low area overhead |
GB2395491B (en) | 2001-08-14 | 2006-03-01 | Magnesium Technology Ltd | Magnesium anodisation system and methods |
US7352609B2 (en) * | 2005-08-15 | 2008-04-01 | International Business Machines Corporation | Voltage controlled static random access memory |
US7466582B2 (en) * | 2005-08-15 | 2008-12-16 | International Business Machines Corporation | Voltage controlled static random access memory |
JP4579965B2 (ja) * | 2007-12-19 | 2010-11-10 | パナソニック株式会社 | 半導体記憶装置 |
US10325648B2 (en) | 2016-12-14 | 2019-06-18 | Qualcomm Incorporated | Write driver scheme for bit-writable memories |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4075690A (en) * | 1976-03-15 | 1978-02-21 | Rca Corporation | Write enhancement circuit |
JPS5619585A (en) * | 1979-07-26 | 1981-02-24 | Toshiba Corp | Semiconductor memory unit |
JPS5831677B2 (ja) * | 1979-11-26 | 1983-07-07 | 富士通株式会社 | 半導体記億装置 |
US4500799A (en) * | 1980-07-28 | 1985-02-19 | Inmos Corporation | Bootstrap driver circuits for an MOS memory |
US4451907A (en) * | 1981-10-26 | 1984-05-29 | Motorola, Inc. | Pull-up circuit for a memory |
-
1982
- 1982-03-31 JP JP57051152A patent/JPS58169958A/ja active Granted
-
1983
- 1983-03-28 EP EP83301734A patent/EP0090632B1/en not_active Expired
- 1983-03-28 DE DE8383301734T patent/DE3380235D1/de not_active Expired
- 1983-03-30 US US06/480,582 patent/US4563754A/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH056675A (ja) * | 1991-06-27 | 1993-01-14 | Nec Corp | スタテイツク型半導体メモリ装置 |
US5875133A (en) * | 1995-07-21 | 1999-02-23 | Seiko Epson Corporation | Semiconductor memory device and a method for stepping up its word lines |
Also Published As
Publication number | Publication date |
---|---|
US4563754A (en) | 1986-01-07 |
JPS6237468B2 (en, 2012) | 1987-08-12 |
EP0090632B1 (en) | 1989-07-19 |
EP0090632A2 (en) | 1983-10-05 |
EP0090632A3 (en) | 1986-10-15 |
DE3380235D1 (en) | 1989-08-24 |
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