JPS58123748A - 半導体装置用パツケ−ジ及びその製造方法 - Google Patents
半導体装置用パツケ−ジ及びその製造方法Info
- Publication number
- JPS58123748A JPS58123748A JP57234988A JP23498882A JPS58123748A JP S58123748 A JPS58123748 A JP S58123748A JP 57234988 A JP57234988 A JP 57234988A JP 23498882 A JP23498882 A JP 23498882A JP S58123748 A JPS58123748 A JP S58123748A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- leads
- semiconductor device
- recess
- central area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 48
- 238000000034 method Methods 0.000 title claims description 18
- 238000005520 cutting process Methods 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000007789 sealing Methods 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 2
- 239000012777 electrically insulating material Substances 0.000 claims 1
- 230000009977 dual effect Effects 0.000 description 15
- 239000000463 material Substances 0.000 description 11
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 3
- 238000010561 standard procedure Methods 0.000 description 3
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 241000234435 Lilium Species 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000004519 grease Substances 0.000 description 1
- 229910000833 kovar Inorganic materials 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000004801 process automation Methods 0.000 description 1
- 229910052705 radium Inorganic materials 0.000 description 1
- HCWPIIXVSYCSAN-UHFFFAOYSA-N radium atom Chemical compound [Ra] HCWPIIXVSYCSAN-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/338,754 US4514750A (en) | 1982-01-11 | 1982-01-11 | Integrated circuit package having interconnected leads adjacent the package ends |
| US338754 | 1982-01-11 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58123748A true JPS58123748A (ja) | 1983-07-23 |
| JPH0479141B2 JPH0479141B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-12-15 |
Family
ID=23326040
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57234988A Granted JPS58123748A (ja) | 1982-01-11 | 1982-12-27 | 半導体装置用パツケ−ジ及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4514750A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
| JP (1) | JPS58123748A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6049658A (ja) * | 1983-08-29 | 1985-03-18 | Nec Corp | 半導体装置 |
| JPS6189654A (ja) * | 1984-10-04 | 1986-05-07 | アマダ、エンジニアリング アンド サ−ビス カンパニ− インコ−ポレ−テツド | デユアル・インライン・パツケ−ジ形半導体加工装置 |
| JPS6329954U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1986-08-12 | 1988-02-27 | ||
| JPH01108755A (ja) * | 1987-10-21 | 1989-04-26 | Toshiba Corp | 半導体装置 |
| JP4757495B2 (ja) * | 2002-12-06 | 2011-08-24 | クリー インコーポレイテッド | 複合リードフレームｌｅｄパッケージおよびその製造方法 |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4680613A (en) * | 1983-12-01 | 1987-07-14 | Fairchild Semiconductor Corporation | Low impedance package for integrated circuit die |
| JPS6132452A (ja) * | 1984-07-25 | 1986-02-15 | Hitachi Ltd | リ−ドフレ−ムとそれを用いた電子装置 |
| US4584627A (en) * | 1985-01-09 | 1986-04-22 | Rogers Corporation | Flat decoupling capacitor and method of manufacture thereof |
| US5917707A (en) | 1993-11-16 | 1999-06-29 | Formfactor, Inc. | Flexible contact structure with an electrically conductive shell |
| US4829362A (en) * | 1986-04-28 | 1989-05-09 | Motorola, Inc. | Lead frame with die bond flag for ceramic packages |
| JPH0815193B2 (ja) * | 1986-08-12 | 1996-02-14 | 新光電気工業株式会社 | 半導体装置及びこれに用いるリードフレーム |
| JPH0719872B2 (ja) * | 1987-03-30 | 1995-03-06 | 三菱電機株式会社 | 半導体装置 |
| US4849857A (en) * | 1987-10-05 | 1989-07-18 | Olin Corporation | Heat dissipating interconnect tape for use in tape automated bonding |
| US4827376A (en) * | 1987-10-05 | 1989-05-02 | Olin Corporation | Heat dissipating interconnect tape for use in tape automated bonding |
| JP2708191B2 (ja) * | 1988-09-20 | 1998-02-04 | 株式会社日立製作所 | 半導体装置 |
| US5270570A (en) * | 1988-10-10 | 1993-12-14 | Lsi Logic Products Gmbh | Lead frame for a multiplicity of terminals |
| US5466967A (en) * | 1988-10-10 | 1995-11-14 | Lsi Logic Products Gmbh | Lead frame for a multiplicity of terminals |
| US5233220A (en) * | 1989-06-30 | 1993-08-03 | Texas Instruments Incorporated | Balanced capacitance lead frame for integrated circuits and integrated circuit device with separate conductive layer |
| US5432127A (en) * | 1989-06-30 | 1995-07-11 | Texas Instruments Incorporated | Method for making a balanced capacitance lead frame for integrated circuits having a power bus and dummy leads |
| DE68905475T2 (de) * | 1989-07-18 | 1993-09-16 | Ibm | Halbleiter-speichermodul hoeher dichte. |
| US5256903A (en) * | 1990-02-28 | 1993-10-26 | Hitachi Ltd. | Plastic encapsulated semiconductor device |
| JP2877479B2 (ja) * | 1990-09-27 | 1999-03-31 | 株式会社東芝 | 半導体装置用リードフレーム |
| US5281849A (en) * | 1991-05-07 | 1994-01-25 | Singh Deo Narendra N | Semiconductor package with segmented lead frame |
| JP2745933B2 (ja) * | 1992-02-17 | 1998-04-28 | 日本電気株式会社 | Ｔａｂ−集積回路 |
| US5452511A (en) * | 1993-11-04 | 1995-09-26 | Chang; Alexander H. C. | Composite lead frame manufacturing method |
| US5820014A (en) | 1993-11-16 | 1998-10-13 | Form Factor, Inc. | Solder preforms |
| US7073254B2 (en) | 1993-11-16 | 2006-07-11 | Formfactor, Inc. | Method for mounting a plurality of spring contact elements |
| US5994152A (en) | 1996-02-21 | 1999-11-30 | Formfactor, Inc. | Fabricating interconnects and tips using sacrificial substrates |
| US8033838B2 (en) | 1996-02-21 | 2011-10-11 | Formfactor, Inc. | Microelectronic contact structure |
| US6048744A (en) * | 1997-09-15 | 2000-04-11 | Micron Technology, Inc. | Integrated circuit package alignment feature |
| US6362426B1 (en) * | 1998-01-09 | 2002-03-26 | Micron Technology, Inc. | Radiused leadframe |
| JP2001168225A (ja) * | 1999-12-13 | 2001-06-22 | Seiko Epson Corp | 半導体チップのパッケージ |
| US6777786B2 (en) * | 2001-03-12 | 2004-08-17 | Fairchild Semiconductor Corporation | Semiconductor device including stacked dies mounted on a leadframe |
| US6991960B2 (en) | 2001-08-30 | 2006-01-31 | Micron Technology, Inc. | Method of semiconductor device package alignment and method of testing |
| US20070126445A1 (en) * | 2005-11-30 | 2007-06-07 | Micron Technology, Inc. | Integrated circuit package testing devices and methods of making and using same |
| US9252782B2 (en) * | 2011-02-14 | 2016-02-02 | Qualcomm Incorporated | Wireless chipset with a non-temperature compensated crystal reference |
| US11342276B2 (en) * | 2019-05-24 | 2022-05-24 | Amkor Technology Singapore Holding Pte. Ltd. | Semiconductor device and method of manufacturing semiconductor device |
| KR20220039708A (ko) | 2019-08-01 | 2022-03-29 | 인피니트 쿨링 인코포레이티드 | 가스 스트림으로부터 유체를 수집하기 위한 시스템 및 방법 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3617819A (en) * | 1970-10-15 | 1971-11-02 | Sylvania Electric Prod | A semiconductor device having a connecting pad of low resistivity semiconductor material interconnecting gold electrodes and aluminum contacts of an enclosure |
| US3714370A (en) * | 1972-01-24 | 1973-01-30 | North American Rockwell | Plastic package assembly for electronic circuit and process for producing the package |
| US4012768A (en) * | 1975-02-03 | 1977-03-15 | Motorola, Inc. | Semiconductor package |
| US4141712A (en) * | 1977-07-18 | 1979-02-27 | Diacon Inc. | Manufacturing process for package for electronic devices |
-
1982
- 1982-01-11 US US06/338,754 patent/US4514750A/en not_active Expired - Fee Related
- 1982-12-27 JP JP57234988A patent/JPS58123748A/ja active Granted
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6049658A (ja) * | 1983-08-29 | 1985-03-18 | Nec Corp | 半導体装置 |
| JPS6189654A (ja) * | 1984-10-04 | 1986-05-07 | アマダ、エンジニアリング アンド サ−ビス カンパニ− インコ−ポレ−テツド | デユアル・インライン・パツケ−ジ形半導体加工装置 |
| JPS6329954U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1986-08-12 | 1988-02-27 | ||
| JPH01108755A (ja) * | 1987-10-21 | 1989-04-26 | Toshiba Corp | 半導体装置 |
| JP4757495B2 (ja) * | 2002-12-06 | 2011-08-24 | クリー インコーポレイテッド | 複合リードフレームｌｅｄパッケージおよびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US4514750A (en) | 1985-04-30 |
| JPH0479141B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-12-15 |
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