JPH1174227A - 半導体装置および該装置を形成するためのプロセス - Google Patents
半導体装置および該装置を形成するためのプロセスInfo
- Publication number
- JPH1174227A JPH1174227A JP10201197A JP20119798A JPH1174227A JP H1174227 A JPH1174227 A JP H1174227A JP 10201197 A JP10201197 A JP 10201197A JP 20119798 A JP20119798 A JP 20119798A JP H1174227 A JPH1174227 A JP H1174227A
- Authority
- JP
- Japan
- Prior art keywords
- film
- nitrogen
- conductive
- tin
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/887,654 | 1997-07-03 | ||
US08/887,654 US6028003A (en) | 1997-07-03 | 1997-07-03 | Method of forming an interconnect structure with a graded composition using a nitrided target |
US08/996,000 | 1997-12-22 | ||
US08/996,000 US5893752A (en) | 1997-12-22 | 1997-12-22 | Process for forming a semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH1174227A true JPH1174227A (ja) | 1999-03-16 |
Family
ID=27128852
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10201197A Pending JPH1174227A (ja) | 1997-07-03 | 1998-07-01 | 半導体装置および該装置を形成するためのプロセス |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPH1174227A (ko) |
KR (1) | KR100365061B1 (ko) |
TW (1) | TW380308B (ko) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000323432A (ja) * | 1999-05-11 | 2000-11-24 | Toshiba Corp | スパッタターゲット、配線膜および電子部品 |
JP2002334882A (ja) * | 2001-05-09 | 2002-11-22 | Sony Corp | 半導体装置およびその製造方法 |
KR100436134B1 (ko) * | 1999-12-30 | 2004-06-14 | 주식회사 하이닉스반도체 | 반도체 소자의 금속배선 형성방법 |
JP2008098424A (ja) * | 2006-10-12 | 2008-04-24 | Rohm Co Ltd | 半導体装置および半導体装置の製造方法 |
JP2008186926A (ja) * | 2007-01-29 | 2008-08-14 | Fujitsu Ltd | 半導体装置とその製造方法 |
JP4763894B2 (ja) * | 1999-04-27 | 2011-08-31 | 東京エレクトロン株式会社 | ハロゲン化タンタル前駆物質からのcvd窒化タンタルプラグの形成 |
CN109671717A (zh) * | 2017-10-17 | 2019-04-23 | 三星显示有限公司 | 金属线和薄膜晶体管 |
CN109800604A (zh) * | 2017-11-16 | 2019-05-24 | 三星电子株式会社 | 硬件嵌入式安全系统及提供其的方法 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008044757A1 (en) | 2006-10-12 | 2008-04-17 | Ulvac, Inc. | Conductive film forming method, thin film transistor, panel with thin film transistor and thin film transistor manufacturing method |
CN105140199B (zh) * | 2015-08-11 | 2018-06-29 | 上海华虹宏力半导体制造有限公司 | 顶层金属薄膜结构以及铝制程工艺方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03156928A (ja) * | 1989-11-15 | 1991-07-04 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JPH0786397A (ja) * | 1993-09-14 | 1995-03-31 | Matsushita Electron Corp | 半導体装置の製造方法 |
JPH07193025A (ja) * | 1993-11-22 | 1995-07-28 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JPH07283219A (ja) * | 1994-04-13 | 1995-10-27 | Sanyo Electric Co Ltd | 半導体装置および半導体装置の製造方法および半導体装 置の製造装置 |
JPH08139090A (ja) * | 1994-11-10 | 1996-05-31 | Nec Corp | 半導体集積回路装置 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5231053A (en) * | 1990-12-27 | 1993-07-27 | Intel Corporation | Process of forming a tri-layer titanium coating for an aluminum layer of a semiconductor device |
-
1998
- 1998-06-24 TW TW087110175A patent/TW380308B/zh not_active IP Right Cessation
- 1998-07-01 JP JP10201197A patent/JPH1174227A/ja active Pending
- 1998-07-03 KR KR10-1998-0026704A patent/KR100365061B1/ko not_active IP Right Cessation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03156928A (ja) * | 1989-11-15 | 1991-07-04 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JPH0786397A (ja) * | 1993-09-14 | 1995-03-31 | Matsushita Electron Corp | 半導体装置の製造方法 |
JPH07193025A (ja) * | 1993-11-22 | 1995-07-28 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JPH07283219A (ja) * | 1994-04-13 | 1995-10-27 | Sanyo Electric Co Ltd | 半導体装置および半導体装置の製造方法および半導体装 置の製造装置 |
JPH08139090A (ja) * | 1994-11-10 | 1996-05-31 | Nec Corp | 半導体集積回路装置 |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4763894B2 (ja) * | 1999-04-27 | 2011-08-31 | 東京エレクトロン株式会社 | ハロゲン化タンタル前駆物質からのcvd窒化タンタルプラグの形成 |
JP2000323432A (ja) * | 1999-05-11 | 2000-11-24 | Toshiba Corp | スパッタターゲット、配線膜および電子部品 |
KR100436134B1 (ko) * | 1999-12-30 | 2004-06-14 | 주식회사 하이닉스반도체 | 반도체 소자의 금속배선 형성방법 |
JP2002334882A (ja) * | 2001-05-09 | 2002-11-22 | Sony Corp | 半導体装置およびその製造方法 |
JP2008098424A (ja) * | 2006-10-12 | 2008-04-24 | Rohm Co Ltd | 半導体装置および半導体装置の製造方法 |
WO2008047687A1 (en) * | 2006-10-12 | 2008-04-24 | Rohm Co., Ltd. | Semiconductor device and semiconductor device manufacturing method |
US8125084B2 (en) | 2006-10-12 | 2012-02-28 | Rohm Co., Ltd. | Semiconductor device and semiconductor device manufacturing method |
JP2008186926A (ja) * | 2007-01-29 | 2008-08-14 | Fujitsu Ltd | 半導体装置とその製造方法 |
CN109671717A (zh) * | 2017-10-17 | 2019-04-23 | 三星显示有限公司 | 金属线和薄膜晶体管 |
CN109800604A (zh) * | 2017-11-16 | 2019-05-24 | 三星电子株式会社 | 硬件嵌入式安全系统及提供其的方法 |
CN109800604B (zh) * | 2017-11-16 | 2024-05-07 | 三星电子株式会社 | 硬件嵌入式安全系统及提供其的方法 |
Also Published As
Publication number | Publication date |
---|---|
TW380308B (en) | 2000-01-21 |
KR100365061B1 (ko) | 2003-04-26 |
KR19990013553A (ko) | 1999-02-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5893752A (en) | Process for forming a semiconductor device | |
US6436825B1 (en) | Method of copper barrier layer formation | |
JP3584054B2 (ja) | 半導体装置及びその製造方法 | |
US6538324B1 (en) | Multi-layered wiring layer and method of fabricating the same | |
US6229211B1 (en) | Semiconductor device and method of manufacturing the same | |
US6461675B2 (en) | Method for forming a copper film on a substrate | |
US6028003A (en) | Method of forming an interconnect structure with a graded composition using a nitrided target | |
US7030023B2 (en) | Method for simultaneous degas and baking in copper damascene process | |
JP2001200358A (ja) | タングステン、アルミニウム、及び銅アプリケーション用ライナ、バリヤ及び/又はシード層としてのpvd−impタングステン及び窒化タングステン | |
JPH11163141A (ja) | シリコン集積回路の製造方法 | |
JPH1140671A (ja) | 半導体装置を形成するためのプロセス | |
EP1313140A1 (en) | Method of forming a liner for tungsten plugs | |
JPH0684911A (ja) | 半導体装置およびその製造方法 | |
US6048788A (en) | Method of fabricating metal plug | |
JPH0653163A (ja) | 集積回路障壁構造体とその製法 | |
US6713407B1 (en) | Method of forming a metal nitride layer over exposed copper | |
JP3586899B2 (ja) | 半導体装置およびその製造方法 | |
JPH1174227A (ja) | 半導体装置および該装置を形成するためのプロセス | |
US20050277292A1 (en) | Method for fabricating low resistivity barrier for copper interconnect | |
JPH0922907A (ja) | 埋め込み導電層の形成方法 | |
US6268284B1 (en) | In situ titanium aluminide deposit in high aspect ratio features | |
US20030186498A1 (en) | Method for fabricating metal interconnection with reliability using ionized physical vapor deposition | |
US20070144892A1 (en) | Method for forming metal film or stacked layer including metal film with reduced surface roughness | |
JP3471266B2 (ja) | 半導体装置の製造方法および半導体装置 | |
JP3890722B2 (ja) | 半導体装置の銅配線 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20020621 |