JPH11355123A - 動的しきい値mosトランジスタを用いたバッファ - Google Patents

動的しきい値mosトランジスタを用いたバッファ

Info

Publication number
JPH11355123A
JPH11355123A JP10163440A JP16344098A JPH11355123A JP H11355123 A JPH11355123 A JP H11355123A JP 10163440 A JP10163440 A JP 10163440A JP 16344098 A JP16344098 A JP 16344098A JP H11355123 A JPH11355123 A JP H11355123A
Authority
JP
Japan
Prior art keywords
transistor
potential
input signal
electrode
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10163440A
Other languages
English (en)
Japanese (ja)
Other versions
JPH11355123A5 (enExample
Inventor
Yuichi Hirano
有一 平野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10163440A priority Critical patent/JPH11355123A/ja
Priority to US09/179,180 priority patent/US6304110B1/en
Priority to TW087118154A priority patent/TW430977B/zh
Priority to FR9814715A priority patent/FR2779886B1/fr
Priority to DE19855602A priority patent/DE19855602C2/de
Priority to KR1019980054634A priority patent/KR100302251B1/ko
Publication of JPH11355123A publication Critical patent/JPH11355123A/ja
Publication of JPH11355123A5 publication Critical patent/JPH11355123A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • H03K19/0013Arrangements for reducing power consumption in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
JP10163440A 1998-06-11 1998-06-11 動的しきい値mosトランジスタを用いたバッファ Pending JPH11355123A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP10163440A JPH11355123A (ja) 1998-06-11 1998-06-11 動的しきい値mosトランジスタを用いたバッファ
US09/179,180 US6304110B1 (en) 1998-06-11 1998-10-27 Buffer using dynamic threshold-voltage MOS transistor
TW087118154A TW430977B (en) 1998-06-11 1998-11-02 Buffer using dynamic threshold-voltage MOS transistor
FR9814715A FR2779886B1 (fr) 1998-06-11 1998-11-23 Amplificateur-separateur utilisant un transistor mos a tension de seuil dynamique
DE19855602A DE19855602C2 (de) 1998-06-11 1998-12-02 Puffer, welcher einen dynamischen Schwellenspannungs-MOS-Transistor verwendet
KR1019980054634A KR100302251B1 (ko) 1998-06-11 1998-12-12 동적임계치mos트랜지스터를사용한버퍼

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10163440A JPH11355123A (ja) 1998-06-11 1998-06-11 動的しきい値mosトランジスタを用いたバッファ

Publications (2)

Publication Number Publication Date
JPH11355123A true JPH11355123A (ja) 1999-12-24
JPH11355123A5 JPH11355123A5 (enExample) 2005-10-13

Family

ID=15773943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10163440A Pending JPH11355123A (ja) 1998-06-11 1998-06-11 動的しきい値mosトランジスタを用いたバッファ

Country Status (6)

Country Link
US (1) US6304110B1 (enExample)
JP (1) JPH11355123A (enExample)
KR (1) KR100302251B1 (enExample)
DE (1) DE19855602C2 (enExample)
FR (1) FR2779886B1 (enExample)
TW (1) TW430977B (enExample)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000035831A (ja) * 1998-07-21 2000-02-02 Nec Corp 可変閾値電圧トランジスタを用いた低スキュークロックツリー回路
US6636073B2 (en) 2000-12-08 2003-10-21 Sharp Kabushiki Kaisha Semiconductor integrated circuit
JP2009049859A (ja) * 2007-08-22 2009-03-05 Seiko Epson Corp 電気回路、電気回路の駆動方法、表示装置および電子機器。
JP2009171552A (ja) * 2007-12-21 2009-07-30 Nec Electronics Corp 半導体出力回路
JP2010028352A (ja) * 2008-07-17 2010-02-04 Ricoh Co Ltd インバータ回路
JP2010109969A (ja) * 2008-10-29 2010-05-13 Taiwan Semiconductor Manufacturing Co Ltd 負バイアス温度不安定性を抑制する動的な基板バイアスシステムおよびその方法
WO2014141800A1 (ja) * 2013-03-12 2014-09-18 シャープ株式会社 シフトレジスタ回路、駆動回路、及び表示装置

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KR100421610B1 (ko) * 2000-03-10 2004-03-10 주식회사 하이닉스반도체 저전압 동적로직의 전력소모 억제회로
US6404243B1 (en) * 2001-01-12 2002-06-11 Hewlett-Packard Company System and method for controlling delay times in floating-body CMOSFET inverters
US6483375B1 (en) 2001-06-28 2002-11-19 Intel Corporation Low power operation mechanism and method
US6518817B2 (en) * 2001-06-28 2003-02-11 Intel Corporation Voltage buffer
US6518826B2 (en) 2001-06-28 2003-02-11 Intel Corporation Method and apparatus for dynamic leakage control
US6804502B2 (en) 2001-10-10 2004-10-12 Peregrine Semiconductor Corporation Switch circuit and method of switching radio frequency signals
KR100434176B1 (ko) * 2001-11-30 2004-06-04 주식회사 하이닉스반도체 전원전압 레벨 검출기
US6677803B1 (en) * 2002-08-21 2004-01-13 Oki Electric Industry Co., Ltd. Semiconductor integrated circuit device
US6833749B2 (en) * 2002-12-09 2004-12-21 Honeywell International Inc. System and method for obtaining hysteresis through body substrate control
KR100728950B1 (ko) * 2004-03-11 2007-06-15 주식회사 하이닉스반도체 내부전압 발생장치
JP4659826B2 (ja) 2004-06-23 2011-03-30 ペレグリン セミコンダクター コーポレーション Rfフロントエンド集積回路
EP1792397A2 (en) * 2004-09-08 2007-06-06 Koninklijke Philips Electronics N.V. Fast switching circuit with input hysteresis
US7205823B2 (en) * 2005-02-23 2007-04-17 Taiwan Semiconductor Manufacturing Co., Ltd. Oscillating buffer with single gate oxide devices
US20080076371A1 (en) 2005-07-11 2008-03-27 Alexander Dribinsky Circuit and method for controlling charge injection in radio frequency switches
USRE48965E1 (en) 2005-07-11 2022-03-08 Psemi Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US7910993B2 (en) 2005-07-11 2011-03-22 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFET's using an accumulated charge sink
US7890891B2 (en) 2005-07-11 2011-02-15 Peregrine Semiconductor Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US9653601B2 (en) 2005-07-11 2017-05-16 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
US8742502B2 (en) 2005-07-11 2014-06-03 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
KR100691108B1 (ko) * 2005-12-28 2007-03-12 동부일렉트로닉스 주식회사 입출력 시차가 감소한 지연 회로
US8207784B2 (en) * 2008-02-12 2012-06-26 Semi Solutions, Llc Method and apparatus for MOSFET drain-source leakage reduction
EP2760136B1 (en) 2008-02-28 2018-05-09 Peregrine Semiconductor Corporation Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device
US7924087B2 (en) * 2008-05-20 2011-04-12 Mediatek Inc. Reference buffer circuit
KR101140347B1 (ko) * 2008-11-19 2012-05-03 한국전자통신연구원 동적 문턱 전압 소자를 이용한 스위칭 회로 및 이를 포함하는 휴대기기용 dc-dc 변환기
JP5338387B2 (ja) * 2009-03-05 2013-11-13 ミツミ電機株式会社 電源切換え装置
US8723260B1 (en) 2009-03-12 2014-05-13 Rf Micro Devices, Inc. Semiconductor radio frequency switch with body contact
JP5529450B2 (ja) * 2009-07-15 2014-06-25 スパンション エルエルシー ボディバイアス制御回路及びボディバイアス制御方法
US20100321094A1 (en) * 2010-08-29 2010-12-23 Hao Luo Method and circuit implementation for reducing the parameter fluctuations in integrated circuits
US8547166B2 (en) * 2011-07-29 2013-10-01 Macronix International Co., Ltd. Temperature compensation circuit and temperature compensated metal oxide semiconductor transistor using the same
US9590674B2 (en) 2012-12-14 2017-03-07 Peregrine Semiconductor Corporation Semiconductor devices with switchable ground-body connection
US20150236748A1 (en) 2013-03-14 2015-08-20 Peregrine Semiconductor Corporation Devices and Methods for Duplexer Loss Reduction
US8803591B1 (en) 2013-11-06 2014-08-12 Freescale Semiconductor, Inc. MOS transistor with forward bulk-biasing circuit
US9406695B2 (en) 2013-11-20 2016-08-02 Peregrine Semiconductor Corporation Circuit and method for improving ESD tolerance and switching speed
US9264045B2 (en) 2014-04-01 2016-02-16 Stmicroelectronics International N.V. Buffer circuit with reduced static leakage through controlled body biasing in FDSOI technology
US9831857B2 (en) 2015-03-11 2017-11-28 Peregrine Semiconductor Corporation Power splitter with programmable output phase shift
US9948281B2 (en) 2016-09-02 2018-04-17 Peregrine Semiconductor Corporation Positive logic digitally tunable capacitor
US10505530B2 (en) 2018-03-28 2019-12-10 Psemi Corporation Positive logic switch with selectable DC blocking circuit
US10886911B2 (en) 2018-03-28 2021-01-05 Psemi Corporation Stacked FET switch bias ladders
US10236872B1 (en) 2018-03-28 2019-03-19 Psemi Corporation AC coupling modules for bias ladders
US11476849B2 (en) 2020-01-06 2022-10-18 Psemi Corporation High power positive logic switch

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
KR940006998B1 (ko) * 1991-05-28 1994-08-03 삼성전자 주식회사 높은 출력 이득을 얻는 데이타 출력 드라이버
US5422591A (en) 1994-01-03 1995-06-06 Sgs-Thomson Microelectronics, Inc. Output driver circuit with body bias control for multiple power supply operation
JPH07212210A (ja) 1994-01-11 1995-08-11 Kanebo Ltd 半導体集積回路
US5537067A (en) * 1994-03-11 1996-07-16 Texas Instruments Incorporated Signal driver circuit operable to control signal rise and fall times
JP3205185B2 (ja) 1994-08-16 2001-09-04 株式会社 沖マイクロデザイン レベル変換回路
US5559368A (en) * 1994-08-30 1996-09-24 The Regents Of The University Of California Dynamic threshold voltage mosfet having gate to body connection for ultra-low voltage operation
JP3085130B2 (ja) * 1995-03-22 2000-09-04 日本電気株式会社 ドライバ回路
US5821769A (en) * 1995-04-21 1998-10-13 Nippon Telegraph And Telephone Corporation Low voltage CMOS logic circuit with threshold voltage control
JP3602216B2 (ja) 1995-09-19 2004-12-15 富士通株式会社 半導体装置
US5644266A (en) 1995-11-13 1997-07-01 Chen; Ming-Jer Dynamic threshold voltage scheme for low voltage CMOS inverter
KR970072681A (ko) * 1996-04-03 1997-11-07 김광호 기판 바이어스가 분리된 회로에서의 정전기 보호회로

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000035831A (ja) * 1998-07-21 2000-02-02 Nec Corp 可変閾値電圧トランジスタを用いた低スキュークロックツリー回路
US6636073B2 (en) 2000-12-08 2003-10-21 Sharp Kabushiki Kaisha Semiconductor integrated circuit
JP2009049859A (ja) * 2007-08-22 2009-03-05 Seiko Epson Corp 電気回路、電気回路の駆動方法、表示装置および電子機器。
JP2009171552A (ja) * 2007-12-21 2009-07-30 Nec Electronics Corp 半導体出力回路
JP2010028352A (ja) * 2008-07-17 2010-02-04 Ricoh Co Ltd インバータ回路
JP2010109969A (ja) * 2008-10-29 2010-05-13 Taiwan Semiconductor Manufacturing Co Ltd 負バイアス温度不安定性を抑制する動的な基板バイアスシステムおよびその方法
WO2014141800A1 (ja) * 2013-03-12 2014-09-18 シャープ株式会社 シフトレジスタ回路、駆動回路、及び表示装置
US9905311B2 (en) 2013-03-12 2018-02-27 Sharp Kabushiki Kaisha Shift register circuit, drive circuit, and display device

Also Published As

Publication number Publication date
KR20000004876A (ko) 2000-01-25
KR100302251B1 (ko) 2001-11-02
DE19855602A1 (de) 1999-12-16
FR2779886A1 (fr) 1999-12-17
FR2779886B1 (fr) 2001-05-04
TW430977B (en) 2001-04-21
US6304110B1 (en) 2001-10-16
DE19855602C2 (de) 2003-01-09

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