JPH0570943B2 - - Google Patents

Info

Publication number
JPH0570943B2
JPH0570943B2 JP59135210A JP13521084A JPH0570943B2 JP H0570943 B2 JPH0570943 B2 JP H0570943B2 JP 59135210 A JP59135210 A JP 59135210A JP 13521084 A JP13521084 A JP 13521084A JP H0570943 B2 JPH0570943 B2 JP H0570943B2
Authority
JP
Japan
Prior art keywords
memory
circuit
power supply
wiring
memory circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59135210A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6122648A (ja
Inventor
Tomoaki Tanabe
Shigeru Fujii
Yoshihisa Takayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59135210A priority Critical patent/JPS6122648A/ja
Priority to DE8585107918T priority patent/DE3585756D1/de
Priority to EP85107918A priority patent/EP0170052B1/en
Priority to US06/750,163 priority patent/US4780846A/en
Priority to KR1019850004739A priority patent/KR900000178B1/ko
Publication of JPS6122648A publication Critical patent/JPS6122648A/ja
Publication of JPH0570943B2 publication Critical patent/JPH0570943B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/909—Microarchitecture
    • H10D84/935—Degree of specialisation for implementing specific functions
    • H10D84/937—Implementation of digital circuits
    • H10D84/938—Implementation of memory functions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/211—Design considerations for internal polarisation
    • H10D89/213—Design considerations for internal polarisation in field-effect devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP59135210A 1984-07-02 1984-07-02 マスタスライス型半導体集積回路装置 Granted JPS6122648A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP59135210A JPS6122648A (ja) 1984-07-02 1984-07-02 マスタスライス型半導体集積回路装置
DE8585107918T DE3585756D1 (de) 1984-07-02 1985-06-27 Halbleiterschaltungsanordnung in hauptscheibentechnik.
EP85107918A EP0170052B1 (en) 1984-07-02 1985-06-27 Master slice type semiconductor circuit device
US06/750,163 US4780846A (en) 1984-07-02 1985-06-28 Master slice type semiconductor circuit device
KR1019850004739A KR900000178B1 (ko) 1984-07-02 1985-07-02 마스터 슬라이스형 반도체 회로장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59135210A JPS6122648A (ja) 1984-07-02 1984-07-02 マスタスライス型半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS6122648A JPS6122648A (ja) 1986-01-31
JPH0570943B2 true JPH0570943B2 (enExample) 1993-10-06

Family

ID=15146419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59135210A Granted JPS6122648A (ja) 1984-07-02 1984-07-02 マスタスライス型半導体集積回路装置

Country Status (2)

Country Link
JP (1) JPS6122648A (enExample)
KR (1) KR900000178B1 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0738414B2 (ja) * 1987-01-09 1995-04-26 株式会社東芝 半導体集積回路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58210638A (ja) * 1982-06-01 1983-12-07 Nec Corp 半導体集積回路
JPS5924492A (ja) * 1982-07-30 1984-02-08 Hitachi Ltd 半導体記憶装置の構成方法
JPS5955519A (ja) * 1982-09-24 1984-03-30 Tokyo Electric Co Ltd コンピユ−タ用基板

Also Published As

Publication number Publication date
KR860001485A (ko) 1986-02-26
KR900000178B1 (ko) 1990-01-23
JPS6122648A (ja) 1986-01-31

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term