JPS6122648A - マスタスライス型半導体集積回路装置 - Google Patents
マスタスライス型半導体集積回路装置Info
- Publication number
- JPS6122648A JPS6122648A JP59135210A JP13521084A JPS6122648A JP S6122648 A JPS6122648 A JP S6122648A JP 59135210 A JP59135210 A JP 59135210A JP 13521084 A JP13521084 A JP 13521084A JP S6122648 A JPS6122648 A JP S6122648A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- circuit
- input
- memory block
- input terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
- H10D84/909—Microarchitecture
- H10D84/935—Degree of specialisation for implementing specific functions
- H10D84/937—Implementation of digital circuits
- H10D84/938—Implementation of memory functions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/211—Design considerations for internal polarisation
- H10D89/213—Design considerations for internal polarisation in field-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59135210A JPS6122648A (ja) | 1984-07-02 | 1984-07-02 | マスタスライス型半導体集積回路装置 |
| DE8585107918T DE3585756D1 (de) | 1984-07-02 | 1985-06-27 | Halbleiterschaltungsanordnung in hauptscheibentechnik. |
| EP85107918A EP0170052B1 (en) | 1984-07-02 | 1985-06-27 | Master slice type semiconductor circuit device |
| US06/750,163 US4780846A (en) | 1984-07-02 | 1985-06-28 | Master slice type semiconductor circuit device |
| KR1019850004739A KR900000178B1 (ko) | 1984-07-02 | 1985-07-02 | 마스터 슬라이스형 반도체 회로장치 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59135210A JPS6122648A (ja) | 1984-07-02 | 1984-07-02 | マスタスライス型半導体集積回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6122648A true JPS6122648A (ja) | 1986-01-31 |
| JPH0570943B2 JPH0570943B2 (enExample) | 1993-10-06 |
Family
ID=15146419
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59135210A Granted JPS6122648A (ja) | 1984-07-02 | 1984-07-02 | マスタスライス型半導体集積回路装置 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS6122648A (enExample) |
| KR (1) | KR900000178B1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63170939A (ja) * | 1987-01-09 | 1988-07-14 | Toshiba Corp | 半導体集積回路 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58210638A (ja) * | 1982-06-01 | 1983-12-07 | Nec Corp | 半導体集積回路 |
| JPS5924492A (ja) * | 1982-07-30 | 1984-02-08 | Hitachi Ltd | 半導体記憶装置の構成方法 |
| JPS5955519A (ja) * | 1982-09-24 | 1984-03-30 | Tokyo Electric Co Ltd | コンピユ−タ用基板 |
-
1984
- 1984-07-02 JP JP59135210A patent/JPS6122648A/ja active Granted
-
1985
- 1985-07-02 KR KR1019850004739A patent/KR900000178B1/ko not_active Expired
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58210638A (ja) * | 1982-06-01 | 1983-12-07 | Nec Corp | 半導体集積回路 |
| JPS5924492A (ja) * | 1982-07-30 | 1984-02-08 | Hitachi Ltd | 半導体記憶装置の構成方法 |
| JPS5955519A (ja) * | 1982-09-24 | 1984-03-30 | Tokyo Electric Co Ltd | コンピユ−タ用基板 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63170939A (ja) * | 1987-01-09 | 1988-07-14 | Toshiba Corp | 半導体集積回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR860001485A (ko) | 1986-02-26 |
| JPH0570943B2 (enExample) | 1993-10-06 |
| KR900000178B1 (ko) | 1990-01-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4660174A (en) | Semiconductor memory device having divided regular circuits | |
| US4780846A (en) | Master slice type semiconductor circuit device | |
| US6335898B2 (en) | Semiconductor IC device having a memory and a logic circuit implemented with a single chip | |
| JPH088304B2 (ja) | 半導体集積回路装置及びその設計方法 | |
| US3968480A (en) | Memory cell | |
| JPH08167703A (ja) | 半導体装置及びその製造方法、ならびにメモリコアチップ及びメモリ周辺回路チップ | |
| KR0172426B1 (ko) | 반도체 메모리장치 | |
| EP0155521A2 (en) | A semiconductor memory device | |
| JPS62137843A (ja) | ゲ−トアレ−デバイス | |
| JP2643953B2 (ja) | 集積メモリ回路 | |
| JP3213639B2 (ja) | アドレス信号デコーダ | |
| JPS6122648A (ja) | マスタスライス型半導体集積回路装置 | |
| JPS59217290A (ja) | 半導体メモリ | |
| JPH01106444A (ja) | ゲートアレイ集積回路 | |
| JPS6122649A (ja) | ゲ−トアレイlsi装置 | |
| JP3579068B2 (ja) | 論理回路 | |
| JPS60240140A (ja) | チップへの信号供給方法 | |
| JPS61123154A (ja) | ゲ−トアレイlsi装置 | |
| JP2720104B2 (ja) | 半導体集積回路装置のメモリセル回路 | |
| CN113454719A (zh) | 命令和地址在存储器装置中的集中化放置 | |
| JPS58212696A (ja) | 半導体メモリ装置 | |
| JP2588539B2 (ja) | 半導体集積回路装置 | |
| JPS62273751A (ja) | 集積回路 | |
| JPH06349281A (ja) | 半導体装置 | |
| JPS60175438A (ja) | 半導体集積回路装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |