JP7412879B2 - dV/dt制御性を備えたIGBT - Google Patents
dV/dt制御性を備えたIGBT Download PDFInfo
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- JP7412879B2 JP7412879B2 JP2018199657A JP2018199657A JP7412879B2 JP 7412879 B2 JP7412879 B2 JP 7412879B2 JP 2018199657 A JP2018199657 A JP 2018199657A JP 2018199657 A JP2018199657 A JP 2018199657A JP 7412879 B2 JP7412879 B2 JP 7412879B2
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- 239000004065 semiconductor Substances 0.000 claims description 226
- 230000004888 barrier function Effects 0.000 claims description 222
- 230000007704 transition Effects 0.000 claims description 98
- 239000002019 doping agent Substances 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 21
- 239000002800 charge carrier Substances 0.000 claims description 15
- 238000012545 processing Methods 0.000 claims description 8
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 claims description 5
- 238000010292 electrical insulation Methods 0.000 claims description 5
- 229910052727 yttrium Inorganic materials 0.000 claims description 5
- 229910015900 BF3 Inorganic materials 0.000 claims description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- -1 difluoroboryl Chemical group 0.000 claims description 2
- 239000000463 material Substances 0.000 description 18
- 238000013461 design Methods 0.000 description 11
- 239000007943 implant Substances 0.000 description 11
- 229910002601 GaN Inorganic materials 0.000 description 10
- 239000012212 insulator Substances 0.000 description 9
- 230000000903 blocking effect Effects 0.000 description 7
- 230000001965 increasing effect Effects 0.000 description 7
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 6
- 229910052738 indium Inorganic materials 0.000 description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 4
- 230000001747 exhibiting effect Effects 0.000 description 4
- 230000000670 limiting effect Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000002829 reductive effect Effects 0.000 description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- 230000001413 cellular effect Effects 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- MARUHZGHZWCEQU-UHFFFAOYSA-N 5-phenyl-2h-tetrazole Chemical compound C1=CC=CC=C1C1=NNN=N1 MARUHZGHZWCEQU-UHFFFAOYSA-N 0.000 description 2
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000013016 damping Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 229910005540 GaP Inorganic materials 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 229910000661 Mercury cadmium telluride Inorganic materials 0.000 description 1
- CEAPMCIMGMZKBG-UHFFFAOYSA-M [Cd].[Hg]Cl Chemical compound [Cd].[Hg]Cl CEAPMCIMGMZKBG-UHFFFAOYSA-M 0.000 description 1
- KXNLCSXBJCPWGL-UHFFFAOYSA-N [Ga].[As].[In] Chemical compound [Ga].[As].[In] KXNLCSXBJCPWGL-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical compound [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000001976 improved effect Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- SBEQWOXEGHQIMW-UHFFFAOYSA-N silicon Chemical compound [Si].[Si] SBEQWOXEGHQIMW-UHFFFAOYSA-N 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229910052714 tellurium Inorganic materials 0.000 description 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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- H—ELECTRICITY
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- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
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- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823493—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
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Description
G=制御トレンチ14
D=ダミートレンチ15
S=ソーストレンチ16
F=浮遊トレンチ17
k=活性メサ18
o=不活性メサ19
oDoSoSkGkSoSoD
(i)互いに隣接して配置されるパススルー通路1053の2つの任意のパススルー通路間の距離(例えば、前記距離Dx及びDy)は、1mm未満である。
(ii)バリア領域105は、半導体本体10の前記半導体層内に配置され、半導体層は、全体が活性セル領域1-2内でのみ延在し、且つ総量を示し、パススルー通路1053は、前記総量の少なくとも1%且つ最大で50%を形成する。半導体層の残りの量、すなわちバリア領域105のpドープ部分は、第2の導電型の半導体領域によって形成される。
(iii)バリア領域105は、その通路1053にもかかわらず、活性セル領域1-2の複数のIGBTセル1-1内に含まれる不活性メサ19を互いに接続する。
(iv)通路1053は、活性セル領域1-2の活性メサ18の少なくともサブセットと横方向にオーバーラップする(例えば、1つ又は複数の通路1053は、ソース領域101の少なくともサブセットと横方向にオーバーラップするように位置付け及び/又は寸法の決定が行われる)。
(v)通路1053は、活性セル領域1-2の制御トレンチ14の少なくともサブセットと横方向にオーバーラップする。
(vi)バリア領域105は、全体が活性セル領域1-2内でのみ延在する(且つ遷移領域1-5内に延在しない)。
(vii)バリア領域105は、(例えば、それぞれの活性メサ18が横方向に位置するそれぞれの制御トレンチ14との接触を確立することなく)活性メサ18のサブセット内に少なくとも部分的に延在する。例えば、それにより、バリア領域105は、活性メサ18のサブセット中のそれぞれの活性メサ18のセクションと、ダミートレンチ15の底部155との間に導電性経路を提供するように構成することができる。
(viii)バリア領域105の横方向構造は、第1のピッチの少なくとも2倍の大きさの第2のピッチを有する第2のレイアウトに従って構成される(IGBTセル1-1は、上記の通り、第1のピッチを有する第1のレイアウトに従った横方向構造を有して構成される)。
(ix)存在する場合(例えば、電力半導体デバイス1が、RC-IGBTとして構成される場合)、通路1053は、第2の負荷端子12に電気的に接続されたn型エミッタと横方向にオーバーラップし得る。
11 第1の負荷端子
12 第2の負荷端子
Z 垂直方向
1-2 活性セル領域
100 ドリフト領域
1-3 エッジ終端領域
109 ウェル領域
1-1 IGBTセル
14 制御トレンチ
141 制御電極
15 ダミートレンチ
151 ダミー電極
16 ソーストレンチ
161 ソース電極
18 活性メサ
19 不活性メサ
105 電気的に浮遊するバリア領域
145、155、165 トレンチ底部
X 第1の横方向
Y 第2の横方向
1-5 遷移領域
W 幅
1053 パススルー通路
10 半導体本体
CC ドーパント濃度
100-1 上側セクション
100-2 下側セクション
102 チャネル領域
13 制御端子
191 遷移
112 絶縁層
1051 上側pn接合
1052 下側pn接合
17 浮遊トレンチ
171 トレンチ電極
101 ソース領域
144 側壁
2 電力半導体デバイスを処理する方法
21 第2の導電型の電気的に浮遊するバリア領域を設けるステップ
Claims (31)
- 第1の負荷端子(11)及び第2の負荷端子(12)を含む電力半導体デバイス(1)であって、前記端子(11、12)間で垂直方向(Z)に沿って負荷電流を伝導するように構成され、且つ
- 第1の導電型のドリフト領域(100)を備えた活性セル領域(1-2)と、
- 第2の導電型のウェル領域(109)を有するエッジ終端領域(1-3)と、
- 前記活性セル領域(1-2)内に配置される複数のIGBTセル(1-1)であって、前記IGBTセル(1-1)のそれぞれは、前記垂直方向(Z)に沿って前記ドリフト領域(100)内に延在し、且つ複数のメサ(18、19)を横方向に制限する複数のトレンチ(14、15、16)を含み、前記複数のトレンチは、
- 制御電極(141)を有する少なくとも1つの制御トレンチ(14)と、
- 前記制御電極(141)に電気的に結合されたダミー電極(151)を有する少なくとも1つのダミートレンチ(15)と、
- 前記第1の負荷端子に電気的に接続されたソース電極(161)を有する少なくとも1つのソーストレンチ(16)と
を含み、前記複数のメサは、
- 前記少なくとも1つの制御トレンチ(14)と前記少なくとも1つのソーストレンチ(16)との間に配置された少なくとも1つの活性メサ(18)と、
- 前記少なくとも1つのダミートレンチ(15)に隣接して配置された少なくとも1つの不活性メサ(19)と
を含む、複数のIGBTセル(1-1)と、
- 前記第2の導電型のバリア領域(105)であって、少なくとも前記ダミートレンチ(15)の底部(155)及び前記ソーストレンチ(16)の底部(165)の両方は、少なくとも部分的に前記バリア領域(105)内に延在し、前記バリア領域(105)と前記ウェル領域(109)との間で横方向(X、Y)に位置する前記ドリフト領域(100)の一部は、前記横方向に少なくとも1μmの横方向延在範囲を有する、バリア領域(105)と
を含む電力半導体デバイス(1)。 - 電力半導体デバイス(1)であって、
- 第1の導電型のドリフト領域(100)を備えた活性セル領域(1-2)と、
- 少なくとも部分的に前記活性セル領域(1-2)内に配置される複数のIGBTセル(1-1)であって、前記IGBTセル(1-1)のそれぞれは、垂直方向(Z)に沿って前記ドリフト領域(100)内に延在する少なくとも1つのトレンチ(14、15、16)を含む、複数のIGBTセル(1-1)と、
- 前記活性セル領域(1-2)を取り囲むエッジ終端領域(1-3)と、
- 前記活性セル領域(1-2)と前記エッジ終端領域(1-3)との間に配置される遷移領域(1-5)であって、前記活性セル領域(1-2)から前記エッジ終端領域(1-3)に向かって横方向(X、Y)に沿って幅(W)を有し、前記IGBTセル(1-1)の少なくとも一部は、前記遷移領域(1-5)内に配置されるか又は前記遷移領域(1-5)内に延在する、遷移領域(1-5)と、
- 第2の導電型のバリア領域(105)であって、前記活性セル領域(1-2)内に且つ前記IGBTセル(1-1)の前記トレンチ(14、15、16)の少なくとも一部と接触して配置され、前記バリア領域(105)は、前記遷移領域(1-5)内に延在しない、バリア領域(105)と
を含む電力半導体デバイス(1)。 - 前記バリア領域(105)は、前記ドリフト領域(100)により、前記垂直方向(Z)に且つ前記垂直方向(Z)に対して空間的に制限される、請求項1又は2に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、前記活性セル領域(1-2)全体を通って延在する横方向に構造化された層として形成される、請求項1~3の何れか一項に記載の電力半導体デバイス(1)。
- 前記IGBTセル(1-1)は、第1のピッチを有する第1のレイアウトに従って横方向構造を有して構成され、前記バリア領域(105)の横方向構造は、第2のレイアウトに従って構成され、前記第2のレイアウトは、前記第1のピッチの少なくとも2倍の大きさの第2のピッチを有する、請求項1~4の何れか一項に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)の横方向構造は、複数のパススルー通路(1053)によって形成される、請求項4又は5に記載の電力半導体デバイス(1)。
- 前記複数のパススルー通路(1053)のそれぞれは、前記ドリフト領域(100)のセクション又は前記IGBTセル(1-1)のそれぞれの1つのトレンチ(14)のセクションの何れかによって充填される、請求項6に記載の電力半導体デバイス(1)。
- 互いに隣接して配置される前記パススルー通路(1053)の2つの任意のパススルー通路間の距離は、1mm未満である、請求項6又は7に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、半導体本体(10)の半導体層内に配置され、前記半導体層は、全体が前記活性セル領域(1-2)内でのみ延在し、且つ総量を示し、前記パススルー通路(1053)は、前記総量の少なくとも1%且つ最大で50%を形成し、前記半導体層の残りの量は、前記第2の導電型の半導体領域によって形成される、請求項6~8の何れか一項に記載の電力半導体デバイス(1)。
- 前記残りの量は、1e14cm-3より大きく且つ1e17cm-3より小さいドーパント濃度(CC)を有し、前記ドーパント濃度は、少なくとも0.1μmの前記垂直方向(Z)に沿った延在範囲内に存在する、請求項9に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、10Ωcmを超え且つ1000Ωcm未満の抵抗率を示し、及び/又は前記バリア領域(105)は、ホウ素、アルミニウム、ジフルオロボリル、三フッ化ホウ素、又はそれらの組み合わせの少なくとも1つを含む、請求項1~10の何れか一項に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、前記垂直方向(Z)に沿って、一方の側の前記ドリフト領域(100)の上側セクション(100-1)と、他方の側の前記ドリフト領域(100)の下側セクション(100-2)とによって制限され、前記上側セクション(100-1)は、前記IGBTセル(1-1)のチャネル領域(102)への遷移を形成する、請求項1~11の何れか一項に記載の電力半導体デバイス(1)。
- 前記上側セクション(100-1)内のドーパント濃度は、前記下側セクション(100-2)内の少なくとも2倍の大きさである、請求項12に記載の電力半導体デバイス(1)。
- 第1の負荷端子(11)及び第2の負荷端子(12)をさらに含み、前記端子(11、12)間で垂直方向(Z)に沿って負荷電流を伝導するように構成され、前記IGBTセル(1-1)のそれぞれは、マイクロパターントレンチ構造を示す、請求項2に記載の電力半導体デバイス(1)。
- 前記IGBTセル(1-1)のそれぞれは、
- 制御電極(141)を有する少なくとも1つの制御トレンチ(14)と、
- ダミー電極(151)を有する少なくとも1つのダミートレンチ(15)と、
- 前記少なくとも1つの制御トレンチ(14)に隣接して配置される少なくとも1つの活性メサ(18)であって、前記制御電極(141)は、前記電力半導体デバイス(1)の制御端子(13)から制御信号を受信し、且つ前記活性メサ(18)における負荷電流を制御するように構成される、少なくとも1つの活性メサ(18)と、
- 前記少なくとも1つのダミートレンチ(15)に隣接して配置される少なくとも1つの不活性メサ(19)であって、前記第1の負荷端子(11)と前記不活性メサ(19)との間の遷移(191)は、少なくとも前記第1の導電型の電荷担体に対して電気絶縁(112)を提供する、少なくとも1つの不活性メサ(19)と
を含む、請求項14に記載の電力半導体デバイス(1)。 - 前記制御電極(141)及び前記ダミー電極(151)は、それぞれ前記制御端子(13)に電気的に結合される、請求項15に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、前記活性メサ(18)のセクションと前記ダミートレンチ(15)の底部(155)との間に導電性経路を提供するように構成される、請求項1、15又は16に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、前記活性セル領域(1-2)の前記複数のIGBTセル(1-1)内に含まれる前記不活性メサ(19)を互いに接続する、請求項1又は請求項15~17の何れか一項に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、上側pn接合(1051)及び下側pn接合(1052)のそれぞれを前記ドリフト領域(100)と共に形成し、前記下側pn接合(1052)は、前記ダミートレンチ(15)の底部(155)及び前記制御トレンチ(14)の底部(145)のそれぞれよりも下側に配置される、請求項1又は請求項15~18の何れか一項に記載の電力半導体デバイス(1)。
- 前記上側pn接合(1051)は、前記活性メサ(18)及び前記不活性メサ(19)のそれぞれの内部に配置され、及び/又は前記ダミートレンチ(15)の前記底部(155)及び前記制御トレンチ(14)の前記底部(145)のそれぞれは、前記バリア領域(105)内に延在する、請求項19に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、前記ダミートレンチ(15)の前記底部(155)が前記バリア領域(105)内に延在する領域において最大ドーパント濃度(CC)を示す、請求項1又は20に記載の電力半導体デバイス(1)。
- 前記バリア領域(105)は、前記活性セル領域(1-2)全体を通って延在する横方向に構造化された層として形成されており、
前記バリア領域(105)の横方向構造は、複数のパススルー通路(1053)によって形成されており、
前記パススルー通路(1053)は、前記IGBTセル(1-1)の前記活性メサ(18)の1つ又は複数と横方向にオーバーラップする、請求項1に記載の電力半導体デバイス(1)。 - 前記パススルー通路(1053)は、前記活性セル領域(1-2)内に存在する活性メサ(18)の総数に対して、前記活性メサ(18)の少なくとも1%且つ最大で50%と横方向にオーバーラップする、請求項22に記載の電力半導体デバイス(1)。
- - 前記IGBTセル(1-1)のそれぞれは、ソース電極(161)を有する少なくとも1つのソーストレンチ(16)をさらに含み、前記ソース電極(161)は、前記第1の負荷端子(11)に電気的に接続され、
- 前記少なくとも1つのソーストレンチ(16)は、前記制御トレンチ(14)と前記ダミートレンチ(15)との間に配置され、且つ/若しくは
- 前記活性メサ(18)は、前記制御トレンチ(14)及び前記ソーストレンチ(16)によって横方向に制限され、且つ/若しくは
- 前記不活性メサ(19)は、前記ソーストレンチ(16)及び前記ダミートレンチ(15)によって横方向に制限され、及び/又は
- 前記IGBTセル(1-1)のそれぞれは、トレンチ電極(171)を有する少なくとも1つの浮遊トレンチ(17)をさらに含み、前記浮遊トレンチ(17)の前記トレンチ電極(171)は、電気的に浮遊しており、
- 前記少なくとも1つの浮遊トレンチ(17)は、前記制御トレンチ(14)と前記ダミートレンチ(15)との間に配置され、且つ/若しくは
- 前記少なくとも1つのソーストレンチ(16)及び前記少なくとも1つの浮遊トレンチ(17)は、前記制御トレンチ(14)と前記ダミートレンチ(15)との間に配置され、及び/又は
- 前記IGBTセル(1-1)のそれぞれの垂直断面において、それぞれの前記IGBTセル(1-1)は、前記負荷電流が前記不活性メサ(19)と前記第1の負荷端子(11)との間の前記遷移(191)を越えることを防止するように構成され、及び/又は
- 前記活性メサ(18)のそれぞれは、前記第1の負荷端子(11)に電気的に接続される前記第1の導電型のソース領域(101)を含み、且つ前記ソース領域(101)及び前記ドリフト領域(100)を分離する第2の導電型のチャネル領域(102)を有し、前記活性メサ(18)において、前記ソース領域(101)、前記チャネル領域(102)、及び前記ドリフト領域(100)のそれぞれの少なくとも各セクションは、前記制御トレンチ(14)の側壁(144)に隣接して配置される、請求項15に記載の電力半導体デバイス(1)。 - 前記遷移領域(1-5)は、前記活性セル領域(1-2)を取り囲む、請求項2に記載の電力半導体デバイス(1)。
- 前記バリア領域が、前記活性セル領域の前記複数のIGBTセル内に含まれる前記不活性メサを互いに接続する、請求項1又は15に記載の電力半導体デバイス(1)。
- 前記バリア領域が、前記ダミートレンチの底部が前記バリア領域内に延在する領域において最大ドーパント濃度を有する、請求項1又は15に記載の電力半導体デバイス(1)。
- 前記バリア領域が、前記ドリフト領域の少なくとも一部によって、前記チャネル領域から分離される、請求項12又は24に記載の電力半導体デバイス(1)。
- 前記バリア領域が電気的に浮遊している、請求項1~28の何れか一項に記載の電力半導体デバイス(1)。
- 電力半導体デバイス(1)を処理する方法(2)であって、前記電力半導体デバイス(1)は、第1の導電型のドリフト領域(100)を備えた活性セル領域(1-2)と、少なくとも部分的に前記活性セル領域(1-2)内に配置される複数のIGBTセル(1-1)であって、前記IGBTセル(1-1)のそれぞれは、垂直方向(Z)に沿って前記ドリフト領域(100)内に延在する少なくとも1つのトレンチ(14、15、16)を含む、複数のIGBTセル(1-1)と、前記活性セル領域(1-2)を取り囲むエッジ終端領域(1-3)と、前記活性セル領域(1-2)と前記エッジ終端領域(1-3)との間に配置される遷移領域(1-5)であって、前記活性セル領域(1-2)から前記エッジ終端領域(1-3)に向かって横方向(X、Y)に沿って幅(W)を有し、前記IGBTセル(1-1)の少なくとも一部は、前記遷移領域(1-5)内に配置されるか又は前記遷移領域(1-5)内に延在する、遷移領域(1-5)とを含み、前記方法は、
- 第2の導電型のバリア領域(105)を設けるステップ(21)であって、前記バリア領域(105)は、前記活性セル領域(1-2)内に且つ前記IGBTセル(1-1)の前記トレンチ(14、15、16)の少なくとも一部と接触して配置され、前記バリア領域(105)は、前記遷移領域(1-5)内に延在しない、ステップ(21)
を含む、方法(2)。 - 前記バリア領域が電気的に浮遊している、請求項30に記載の方法(2)。
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