JP7228040B2 - SiC半導体装置およびその製造方法 - Google Patents
SiC半導体装置およびその製造方法 Download PDFInfo
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- JP7228040B2 JP7228040B2 JP2021528248A JP2021528248A JP7228040B2 JP 7228040 B2 JP7228040 B2 JP 7228040B2 JP 2021528248 A JP2021528248 A JP 2021528248A JP 2021528248 A JP2021528248 A JP 2021528248A JP 7228040 B2 JP7228040 B2 JP 7228040B2
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Description
2 SiCチップ
3 第1主面
4 第2主面
5A 側面
5B 側面
5C 側面
5D 側面
7 SiCエピタキシャル層
8A 改質領域
8B 改質領域
8C 改質領域
8D 改質領域
20 アライメントパターン
26 アライメントトレンチ
27 絶縁体
30 層間絶縁層
32 第1主面電極
41 絶縁層
44 傾斜面
46 樹脂層
62 SiCウエハ
63 第1ウエハ主面
71 チップ領域
71A 第1チップ領域
71B 第2チップ領域
72 切断予定ライン
73 モニタパターン
90 ダイシングストリート
93 改質領域
101 SiC半導体装置
Claims (26)
- 主面を有し、SiC単結晶からなるSiCウエハを用意する工程と、
機能デバイスが形成される第1チップ領域、および、前記第1チップ領域のプロセス管理を間接的に行うモニタパターンが形成される第2チップ領域を含む複数のチップ領域を区画する切断予定ラインを画定する複数のアライメントパターンを前記主面に形成する工程と、
前記切断予定ラインを露出させるように複数の前記チップ領域をそれぞれ被覆し、前記機能デバイスの一部および前記モニタパターンの一部をそれぞれ形成する複数の主面電極を前記主面の上に形成する工程と、
複数の前記主面電極を部分的に被覆し、隣り合う複数の前記チップ領域の間の領域において前記切断予定ラインと共に複数の前記アライメントパターンを露出させるダイシングストリートを区画する複数の絶縁層を前記主面の上に形成する工程と、
複数の前記主面電極および複数の前記絶縁層から露出する前記切断予定ラインに前記ダイシングストリートを介してレーザ光を照射し、SiC単結晶とは異なる性質に改質した改質領域を前記SiCウエハ内に形成する工程と、
前記改質領域を起点に前記SiCウエハを劈開する工程と、を含み、
前記アライメントパターンは、金属材料を含まない、SiC半導体装置の製造方法。 - 主面を有し、SiC単結晶からなるSiCウエハを用意する工程と、
機能デバイスが形成される第1チップ領域、および、前記第1チップ領域のプロセス管理を間接的に行うモニタパターンが形成される第2チップ領域を含む複数のチップ領域を区画する切断予定ラインを画定する複数のアライメントパターンを前記主面に形成する工程と、
前記切断予定ラインを露出させるように複数の前記チップ領域をそれぞれ被覆し、前記機能デバイスの一部および前記モニタパターンの一部をそれぞれ形成する複数の主面電極を前記主面の上に形成する工程と、
複数の前記主面電極を部分的に被覆し、隣り合う複数の前記チップ領域の間の領域において前記切断予定ラインと共に複数の前記アライメントパターンを露出させるダイシングストリートを区画する複数の絶縁層を前記主面の上に形成する工程と、
複数の前記主面電極および複数の前記絶縁層から露出する前記切断予定ラインに前記ダイシングストリートを介してレーザ光を照射し、SiC単結晶とは異なる性質に改質した改質領域を前記SiCウエハ内に形成する工程と、
前記改質領域を起点に前記SiCウエハを劈開する工程と、を含み、
前記SiCウエハの用意工程は、SiC基板およびSiCエピタキシャル層を含み、前記SiCエピタキシャル層によって形成された前記主面を有する前記SiCウエハを用意する工程を含み、
複数の前記アライメントパターンの形成工程は、前記SiCエピタキシャル層内に側壁および底壁を有する複数のトレンチを前記主面に形成する工程を含む、SiC半導体装置の製造方法。 - 前記アライメントパターンは、金属材料を含まない、請求項2に記載のSiC半導体装置の製造方法。
- 複数の前記アライメントパターンの形成工程は、複数の前記トレンチ内に透明な絶縁体を埋設する工程を含む、請求項2または3に記載のSiC半導体装置の製造方法。
- 前記改質領域の形成工程は、前記SiC基板のうち前記SiCエピタキシャル層から間隔を空けた部分に前記レーザ光を照射し、前記SiC基板のうち前記SiCエピタキシャル層から間隔を空けた部分に前記改質領域を形成する工程を含む、請求項2に記載のSiC半導体装置の製造方法。
- 前記ダイシングストリートを区画する傾斜面をそれぞれ有する複数の前記絶縁層が形成される、請求項1~5のいずれか一項に記載のSiC半導体装置の製造方法。
- 複数の前記絶縁層は、湾曲状に窪んだ前記傾斜面をそれぞれ有している、請求項6に記載のSiC半導体装置の製造方法。
- 前記ダイシングストリートは、前記SiCウエハの厚さの10%以上50%以下の幅を有している、請求項1~7のいずれか一項に記載のSiC半導体装置の製造方法。
- 複数の前記絶縁層は、樹脂層を含む、請求項1~8のいずれか一項に記載のSiC半導体装置の製造方法。
- 前記切断予定ラインは、複数の前記アライメントパターンから間隔を空けて、近接する複数の前記アライメントパターンの間の領域に画定される、請求項1~9のいずれか一項に記載のSiC半導体装置の製造方法。
- 複数の前記アライメントパターンが配置された周縁部をそれぞれ有する複数の前記チップ領域が設定され、
複数の前記アライメントパターンが複数の前記チップ領域に残存するように、前記SiCウエハが劈開される、請求項1~10のいずれか一項に記載のSiC半導体装置の製造方法。 - 複数の前記アライメントパターンの形成工程の後、前記主面電極の形成工程に先立って、前記主面の上に層間絶縁層を形成する工程をさらに含み、
前記主面電極は、前記層間絶縁層の上に形成される、請求項1~11のいずれか一項に記載のSiC半導体装置の製造方法。 - 前記切断予定ラインおよび複数の前記アライメントパターンを被覆する前記層間絶縁層が形成され、
前記レーザ光は、前記層間絶縁層を介して前記SiCウエハに照射され、
前記SiCウエハは、前記層間絶縁層と共に劈開される、請求項12に記載のSiC半導体装置の製造方法。 - 複数の前記チップ領域を行列状に区画する格子状の前記切断予定ラインが設定される、請求項1~13のいずれか一項に記載のSiC半導体装置の製造方法。
- 複数の前記チップ領域をSiC単結晶のa軸方向およびm軸方向に整列した行列状に区画し、SiC単結晶のa軸方向およびm軸方向に延びる格子状の前記切断予定ラインが設定され、
前記SiCウエハは、SiC単結晶のa軸方向およびm軸方向に沿って劈開される、請求項1~14のいずれか一項に記載のSiC半導体装置の製造方法。 - 1つまたは複数の前記第1チップ領域を挟んでSiC単結晶のa軸方向に対向する複数の前記第2チップ領域を含む、請求項15に記載のSiC半導体装置の製造方法。
- 1つまたは複数の前記第1チップ領域を挟んでSiC単結晶のm軸方向に対向する複数の前記第2チップ領域を含む、請求項15または16に記載のSiC半導体装置の製造方法。
- 前記第1チップ領域の個数は、100個以上10000個以下であり、
前記第2チップ領域の個数は、1個以上20個以下である、請求項1~17のいずれか一項に記載のSiC半導体装置の製造方法。 - 前記第1チップ領域は、モニタパターンを有さない、請求項1~18のいずれか一項に記載のSiC半導体装置の製造方法。
- 平面視において四角形状にそれぞれ形成された第1主面および第2主面、ならびに、前記第1主面および前記第2主面をそれぞれ接続し、劈開面からそれぞれなる4つの側面を有するSiCチップと、
各前記側面に形成され、SiC単結晶とは異なる性質に改質された改質領域と、
平面視において各前記側面から内方に間隔を空けて前記第1主面の周縁部に形成されたアクセサリパターンとしてのアライメントパターンと、
各前記側面から内方に間隔を空けて前記第1主面の上に形成され、平面視において前記アライメントパターンを露出させる主面電極と、
各前記側面から内方に間隔を空けて前記第1主面の上に形成され、前記主面電極を部分的に被覆し、平面視において前記側面との間で前記アライメントパターンを露出させるダイシングストリートを区画する絶縁層と、を含み、
平面視において前記ダイシングストリート内に位置する前記第1主面の周縁部には、前記アライメントパターン以外のアクセサリパターンとしての金属パターンは形成されておらず、
前記アライメントパターンは、金属材料を含まない、SiC半導体装置。 - 前記アライメントパターンは、平面視において前記第1主面の角部に形成されている、請求項20に記載のSiC半導体装置。
- 前記アライメントパターンは、前記第1主面に形成されたトレンチを含む、請求項20または21に記載のSiC半導体装置。
- 前記アライメントパターンは、前記トレンチに埋設された透明な絶縁体を含む、請求項22に記載のSiC半導体装置。
- 前記SiCチップは、SiC基板およびSiCエピタキシャル層を含み、前記SiCエピタキシャル層によって形成された前記第1主面を有し、
前記トレンチは、前記SiCエピタキシャル層内に位置する側壁および底壁を有している、請求項22または23に記載のSiC半導体装置。 - 前記改質領域は、各前記側面において、前記SiCエピタキシャル層からなる部分から間隔を空けて前記SiC基板からなる部分に形成されている、請求項24に記載のSiC半導体装置。
- 前記第1主面の上に形成され、前記アライメントパターンを被覆する層間絶縁層をさらに含み、
前記主面電極は、前記層間絶縁層の上に形成され、
前記絶縁層は、前記層間絶縁層の上に形成され、前記層間絶縁層を介して前記アライメントパターンを露出させる前記ダイシングストリートを区画している、請求項20~25のいずれか一項に記載のSiC半導体装置。
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JP2000252236A (ja) | 1999-03-03 | 2000-09-14 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2002050682A (ja) | 2000-08-07 | 2002-02-15 | Sony Corp | 半導体装置の製造方法およびレチクルマスク |
JP2002134701A (ja) | 2000-10-25 | 2002-05-10 | Nec Corp | 半導体装置の製造方法 |
JP2002184661A (ja) | 2000-12-12 | 2002-06-28 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2005322847A (ja) | 2004-05-11 | 2005-11-17 | Stanley Electric Co Ltd | 半導体発光装置とその製造方法 |
WO2007055010A1 (ja) | 2005-11-10 | 2007-05-18 | Renesas Technology Corp. | 半導体装置の製造方法および半導体装置 |
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- 2020-06-16 WO PCT/JP2020/023529 patent/WO2020255944A1/ja active Application Filing
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- 2020-06-16 CN CN202080028353.6A patent/CN113728425A/zh active Pending
- 2020-06-16 US US17/424,100 patent/US20220102502A1/en active Pending
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JP2002050682A (ja) | 2000-08-07 | 2002-02-15 | Sony Corp | 半導体装置の製造方法およびレチクルマスク |
JP2002134701A (ja) | 2000-10-25 | 2002-05-10 | Nec Corp | 半導体装置の製造方法 |
JP2002184661A (ja) | 2000-12-12 | 2002-06-28 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2005322847A (ja) | 2004-05-11 | 2005-11-17 | Stanley Electric Co Ltd | 半導体発光装置とその製造方法 |
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JP2011222607A (ja) | 2010-04-06 | 2011-11-04 | Mitsubishi Electric Corp | SiC半導体素子の製造方法 |
JP2012124211A (ja) | 2010-12-06 | 2012-06-28 | Panasonic Corp | 半導体ウェハのダイシングライン加工方法および半導体チップの製造方法 |
JP2012146876A (ja) | 2011-01-13 | 2012-08-02 | Hamamatsu Photonics Kk | レーザ加工方法 |
JP2013172124A (ja) | 2012-02-23 | 2013-09-02 | Mitsubishi Electric Corp | Soiウエハおよびその製造方法 |
US20140131876A1 (en) | 2012-11-14 | 2014-05-15 | Advanced Semiconductor Engineering, Inc. | Method for dicing a semiconductor wafer having through silicon vias and resultant structures |
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DE112020000275T5 (de) | 2022-05-12 |
JP2023055953A (ja) | 2023-04-18 |
DE212020000293U1 (de) | 2021-01-22 |
US20220102502A1 (en) | 2022-03-31 |
JPWO2020255944A1 (ja) | 2021-11-25 |
WO2020255944A1 (ja) | 2020-12-24 |
CN113728425A (zh) | 2021-11-30 |
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