JP7102525B2 - 入出力回路が内蔵された電力増幅器用パッケージの製造方法 - Google Patents
入出力回路が内蔵された電力増幅器用パッケージの製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims description 30
- 229910052751 metal Inorganic materials 0.000 claims description 48
- 239000002184 metal Substances 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 21
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 17
- 229910052759 nickel Inorganic materials 0.000 claims description 9
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 5
- 238000007747 plating Methods 0.000 claims description 4
- 238000007639 printing Methods 0.000 claims description 4
- 229910000914 Mn alloy Inorganic materials 0.000 claims description 3
- PCEXQRKSUSSDFT-UHFFFAOYSA-N [Mn].[Mo] Chemical compound [Mn].[Mo] PCEXQRKSUSSDFT-UHFFFAOYSA-N 0.000 claims description 3
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 238000005245 sintering Methods 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 5
- 229910052593 corundum Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 description 2
- 238000005219 brazing Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 238000007648 laser printing Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4839—Assembly of a flat lead with an insulating support, e.g. for TAB
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4828—Etching
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
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- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
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- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
- H01L2223/6655—Matching arrangements, e.g. arrangement of inductive and capacitive components
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
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- Lead Frames For Integrated Circuits (AREA)
Description
定されるものではない。
Claims (5)
- 誘電体回路基板、ヒートシンク、及びリードフレームを含む入出力回路が内蔵された電力増幅器用パッケージの製造方法において、
誘電体基板に電力増幅器チップが配置される電力増幅器孔を形成する段階であって、前記電力増幅器チップを前記電力増幅器孔に配置すると、前記電力増幅器チップが前記入出力回路と同一平面上に配置され、したがって、前記誘電体基板と前記リードフレームとを同一平面上に配置させる、段階と、前記電力増幅器孔の左側に入力マッチングネットワーク金属パターンを印刷し、前記電力増幅器孔の右側に出力マッチングネットワーク金属パターンを印刷する段階と、前記誘電体基板に印刷された入力マッチングネットワーク金属パターン及び出力マッチングネットワーク金属パターンを焼結する段階と、で構成される誘電体回路基板を準備する段階と、
合金(alloy)42をエッチングし、ニッケルでメッキしてリードフレームを準備する段階と、
前記誘電体回路基板の下面に前記ヒートシンクを取り付け、前記誘電体回路基板の入力マッチングネットワーク金属パターン及び出力マッチングネットワーク金属パターンに前記リードフレームを取り付けた後、前記誘電体回路基板の入力マッチングネットワーク金属パターンと出力マッチングネットワーク金属パターン、及び前記リードフレームをニッケル/金でメッキする段階と、を含む入出力回路が内蔵された電力増幅器用パッケージの製造方法。 - 前記誘電体回路基板を準備する段階において、前記誘電体基板は、アルミナ(Al2O3)セラミック基板であることを特徴とする請求項1に記載の入出力回路が内蔵された電力増幅器用パッケージの製造方法。
- 前記誘電体回路基板を準備する段階において、前記入力マッチングネットワーク金属パターン及び前記出力マッチングネットワーク金属パターンは、タングステン(W)またはモリブデンマンガン合金(MoMn)で印刷されることを特徴とする請求項1に記載の入出力回路が内蔵された電力増幅器用パッケージの製造方法。
- 前記誘電体回路基板を準備する段階において、前記誘電体基板に印刷された入力マッチングネットワーク金属パターン及び出力マッチングネットワーク金属パターンを、電気炉において1250℃~1500℃で焼結することを特徴とする請求項1に記載の入出力回路が内蔵された電力増幅器用パッケージの製造方法。
- 前記誘電体回路基板を準備する段階において、前記入力マッチングネットワーク金属パターン及び出力マッチングネットワーク金属パターンを印刷した後、前記入力マッチングネットワーク金属パターン及び出力マッチングネットワーク金属パターンをニッケル/パラジウム/金で表面処理することを特徴とする請求項1に記載の入出力回路が内蔵された電力増幅器用パッケージの製造方法。
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KR1020180150331A KR102129556B1 (ko) | 2018-11-29 | 2018-11-29 | 입출력회로가 내장된 전력 증폭기용 패키지의 제조 방법 |
KR10-2018-0150331 | 2018-11-29 | ||
PCT/KR2018/014926 WO2020111321A1 (ko) | 2018-11-29 | 2018-11-29 | 입출력회로가 내장된 전력 증폭기용 패키지의 제조 방법 |
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JP2021510235A JP2021510235A (ja) | 2021-04-15 |
JP7102525B2 true JP7102525B2 (ja) | 2022-07-19 |
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US (1) | US11264251B2 (ja) |
JP (1) | JP7102525B2 (ja) |
KR (1) | KR102129556B1 (ja) |
WO (1) | WO2020111321A1 (ja) |
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CN113015349A (zh) * | 2021-03-01 | 2021-06-22 | 哈尔滨工业大学 | 内置输入输出电路的功率放大器的封装制造方法 |
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- 2018-11-29 WO PCT/KR2018/014926 patent/WO2020111321A1/ko active Application Filing
- 2018-11-29 US US16/766,483 patent/US11264251B2/en active Active
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WO2020111321A1 (ko) | 2020-06-04 |
KR20200064324A (ko) | 2020-06-08 |
JP2021510235A (ja) | 2021-04-15 |
US20210013050A1 (en) | 2021-01-14 |
US11264251B2 (en) | 2022-03-01 |
KR102129556B1 (ko) | 2020-07-02 |
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