JP7013717B2 - 半導体装置の製造方法及びはんだ付け補助治具 - Google Patents
半導体装置の製造方法及びはんだ付け補助治具 Download PDFInfo
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- JP7013717B2 JP7013717B2 JP2017157692A JP2017157692A JP7013717B2 JP 7013717 B2 JP7013717 B2 JP 7013717B2 JP 2017157692 A JP2017157692 A JP 2017157692A JP 2017157692 A JP2017157692 A JP 2017157692A JP 7013717 B2 JP7013717 B2 JP 7013717B2
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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Description
第1の実施の形態の半導体装置の製造方法について、図1及び図2を用いて説明する。
第2の実施の形態では、第1の実施の形態をより具体的に説明する。
第3の実施の形態では、リフローはんだ付け工程時の加熱により反りが生じたセラミック回路基板10に対して用いられるはんだ付け補助治具について説明する。
第4の実施の形態では、第3の実施の形態のはんだ付け補助治具の変形例について図21を用いて説明する。
第5の実施の形態では、第2の実施の形態のはんだ付け補助治具の変形例について図22を用いて説明する。
第6の実施の形態では、第5の実施の形態のはんだ付け補助治具の変形例について図23を用いて説明する。
第7の実施の形態では、押え治具に、はんだ付け補助治具の被覆部材が取り付けられている場合を例に挙げて説明する。
第8の実施の形態では、押え治具に、第5の実施の形態のはんだ付け補助治具の被覆部材が取り付けられている場合を例に挙げて説明する。
1a 絶縁板
1b1,1b2 回路パターン
1c 金属板
2 はんだ
3 半導体素子
4a,4b,4c ボンディングワイヤ
6a,6b はんだ付け補助治具
A1 配置領域
A2,A3 隣接接続領域
Claims (15)
- 構成部品、及び、平面視で矩形状の絶縁板と前記絶縁板のおもて面に形成され、前記構成部品が配置される配置領域及び配線部材が直接接続される接続領域が主面にそれぞれ設定された回路パターンとを有する基板を用意する準備工程と、
前記基板の前記配置領域にはんだを配置するはんだ配置工程と、
前記基板の前記配置領域上に前記はんだを介して前記構成部品を配置する部品配置工程と、
前記基板の前記接続領域のうち前記配置領域に隣接する隣接接続領域を覆った状態で加熱し、前記配置領域に前記構成部品を接合する部品接合工程と、
を有し、
前記部品配置工程では、前記配置領域に対応した下部開口部が主面に形成された板状の位置決め治具を前記基板上に配置し、前記下部開口部に基づき前記配置領域に前記構成部品を配置し、
前記部品接合工程では、底部に前記隣接接続領域に対応する被覆面を備える柱状の被覆部材を含むはんだ付け補助治具を前記基板上に前記下部開口部を通じて配置して、前記隣接接続領域を前記被覆面で覆う、
半導体装置の製造方法。 - 前記部品接合工程後、前記隣接接続領域に前記配線部材を直接接合する配線部材接合工程をさらに有する、
請求項1に記載の半導体装置の製造方法。 - 前記部品接合工程では、前記基板上に配置された前記位置決め治具の前記下部開口部に前記はんだ付け補助治具を配置して、前記隣接接続領域を前記被覆面で覆う、
請求項1に記載の半導体装置の製造方法。 - 前記準備工程では、前記回路パターンのコンタクト部品配置領域に配置されるコンタクト部品をさらに用意し、
前記部品配置工程では、前記コンタクト部品配置領域に対応したコンタクト部品位置決め孔が前記主面にさらに形成された前記位置決め治具を前記基板上に配置し、前記コンタクト部品位置決め孔に基づき前記コンタクト部品配置領域に前記コンタクト部品をさらに配置する、
請求項3に記載の半導体装置の製造方法。 - 前記部品接合工程では、前記基板上に配置された前記位置決め治具の前記コンタクト部品位置決め孔に配置された前記コンタクト部品を前記基板側に押圧しながら、加熱する、
請求項4に記載の半導体装置の製造方法。 - 前記部品接合工程では、前記部品配置工程後、前記下部開口部に対応する上部開口部が形成された板状の押え治具を前記位置決め治具上に配置し、
前記位置決め治具の前記下部開口部と前記押え治具の前記上部開口部とに前記はんだ付け補助治具を配置して、前記隣接接続領域を前記被覆面で覆い、
前記押え治具で前記位置決め治具の前記コンタクト部品位置決め孔に配置された前記コンタクト部品を前記基板側に押圧しながら、加熱する、
請求項5に記載の半導体装置の製造方法。 - 前記部品接合工程では、前記部品配置工程後、前記下部開口部に対応する領域に前記はんだ付け補助治具の前記被覆部材の前記被覆面の反対側の面が取り付けられた板状の押え治具を前記位置決め治具上に配置し、前記隣接接続領域を前記被覆面で覆い、
前記押え治具で前記位置決め治具の前記コンタクト部品位置決め孔に配置された前記コンタクト部品を前記基板側に押圧しながら、加熱する、
請求項5に記載の半導体装置の製造方法。 - 前記構成部品は、半導体素子である、
請求項1に記載の半導体装置の製造方法。 - 平面視で矩形状の絶縁板と、
前記絶縁板のおもて面に形成され、構成部品が配置される配置領域と配線部材が直接接続される接続領域とが主面にそれぞれ設定された回路パターンと、
を有し、前記配置領域に対応した下部開口部が主面に形成された板状の位置決め治具が配置された基板に対して、
前記接続領域のうち、前記配置領域に隣接する隣接接続領域に対応する被覆面を底部に備え、前記下部開口部を通じて前記配置領域に配置されて、前記隣接接続領域を前記被覆面で覆う柱状の被覆部材、
を有するはんだ付け補助治具。 - 前記被覆部材は、前記構成部品を前記配置領域にはんだを用いて接合させるための加熱により生じる前記基板の長手方向の反りに対応して、前記被覆面に曲面が形成されている、
請求項9に記載のはんだ付け補助治具。 - 平面視で矩形状の絶縁板と、
前記絶縁板のおもて面に形成され、構成部品が配置される配置領域と配線部材が直接接続される接続領域とが主面にそれぞれ設定された回路パターンと、
を有する基板に対して、
前記接続領域のうち、前記配置領域に隣接する隣接接続領域に対応する被覆面を底部に備え、前記構成部品を前記配置領域にはんだを用いて接合させるための加熱により生じる前記基板の長手方向の反りに対応して、前記被覆面に複数の段差が形成されている柱状の被覆部材、
を有するはんだ付け補助治具。 - 平面視で矩形状の絶縁板と、
前記絶縁板のおもて面に形成され、構成部品が配置される配置領域と配線部材が直接接続される接続領域とが主面にそれぞれ設定された回路パターンと、
を有し、前記接続領域が前記回路パターン上に複数設定されて、前記配置領域に隣接する隣接接続領域が長手方向に沿って並んでいる基板に対して、
前記接続領域のうち、前記隣接接続領域に対応する被覆面を底部に備え、前記隣接接続領域にそれぞれ対応して複数設けられている柱状の被覆部材、
を有するはんだ付け補助治具。 - 前記被覆部材は、前記構成部品を前記配置領域にはんだを用いて接合させるための加熱により生じる前記基板の短手方向の反りに対応して、前記被覆部材の高さがそれぞれ調節されている、
請求項12に記載のはんだ付け補助治具。 - 前記隣接接続領域にそれぞれ対応して形成された開口部に前記被覆部材が前記基板の主面に対して垂直方向に上下動可能にそれぞれ挿通される天板部、
をさらに有する請求項12に記載のはんだ付け補助治具。 - 前記構成部品は、半導体素子である、
請求項9に記載のはんだ付け補助治具。
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002368400A (ja) | 2001-06-06 | 2002-12-20 | Denso Corp | 電子部品の実装方法 |
JP2003347493A (ja) | 2002-05-24 | 2003-12-05 | Denso Corp | 電子部品の実装方法及びそれに使用される汚染防止用チップ |
JP2012164841A (ja) | 2011-02-08 | 2012-08-30 | Fuji Electric Co Ltd | 半導体装置の組立治具および半導体装置の組立方法 |
JP2013065662A (ja) | 2011-09-16 | 2013-04-11 | Fuji Electric Co Ltd | 半導体チップの位置決め治具及び半導体装置の製造方法 |
JP2014187179A (ja) | 2013-03-22 | 2014-10-02 | Fuji Electric Co Ltd | 半導体装置の製造方法及び取り付け治具 |
JP2015170731A (ja) | 2014-03-07 | 2015-09-28 | 富士電機株式会社 | 半導体装置、半導体装置の製造方法、位置決め治具 |
JP2015185630A (ja) | 2014-03-24 | 2015-10-22 | 日産自動車株式会社 | ハーフブリッジパワー半導体モジュール及びその製造方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JPH07106362A (ja) * | 1993-10-07 | 1995-04-21 | Nippondenso Co Ltd | 回路基板の製造方法 |
JP3736001B2 (ja) * | 1996-02-29 | 2006-01-18 | 株式会社デンソー | 電子部品の実装方法 |
JP2002198396A (ja) * | 2000-12-26 | 2002-07-12 | Matsushita Electric Ind Co Ltd | 半導体装置、半導体装置の製造方法、及び半導体装置用回路基板 |
JP5262408B2 (ja) * | 2008-08-07 | 2013-08-14 | 富士電機株式会社 | 位置決め治具および半導体装置の製造方法 |
WO2014077282A1 (ja) * | 2012-11-15 | 2014-05-22 | 日産自動車株式会社 | Au系はんだダイアタッチメント半導体装置及びその製造方法 |
JP6330640B2 (ja) | 2014-12-09 | 2018-05-30 | 三菱電機株式会社 | 半導体装置の製造方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002368400A (ja) | 2001-06-06 | 2002-12-20 | Denso Corp | 電子部品の実装方法 |
JP2003347493A (ja) | 2002-05-24 | 2003-12-05 | Denso Corp | 電子部品の実装方法及びそれに使用される汚染防止用チップ |
JP2012164841A (ja) | 2011-02-08 | 2012-08-30 | Fuji Electric Co Ltd | 半導体装置の組立治具および半導体装置の組立方法 |
JP2013065662A (ja) | 2011-09-16 | 2013-04-11 | Fuji Electric Co Ltd | 半導体チップの位置決め治具及び半導体装置の製造方法 |
JP2014187179A (ja) | 2013-03-22 | 2014-10-02 | Fuji Electric Co Ltd | 半導体装置の製造方法及び取り付け治具 |
JP2015170731A (ja) | 2014-03-07 | 2015-09-28 | 富士電機株式会社 | 半導体装置、半導体装置の製造方法、位置決め治具 |
JP2015185630A (ja) | 2014-03-24 | 2015-10-22 | 日産自動車株式会社 | ハーフブリッジパワー半導体モジュール及びその製造方法 |
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