JP2013065662A - 半導体チップの位置決め治具及び半導体装置の製造方法 - Google Patents
半導体チップの位置決め治具及び半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 137
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 229910000679 solder Inorganic materials 0.000 claims abstract description 92
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 25
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 46
- 229910052799 carbon Inorganic materials 0.000 claims description 45
- 238000002844 melting Methods 0.000 claims description 8
- 230000008018 melting Effects 0.000 claims description 8
- 238000005476 soldering Methods 0.000 claims description 6
- 238000000034 method Methods 0.000 abstract description 18
- 230000007547 defect Effects 0.000 abstract description 6
- 238000011109 contamination Methods 0.000 abstract description 4
- 238000009413 insulation Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 8
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 239000011800 void material Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000004907 flux Effects 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3201—Structure
- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
- H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
【解決手段】絶縁回路基板の一面に載置される金属薄板に半導体チップを半田付けする際に用いられる半導体チップの位置決め治具3であって、位置決め治具3は、前記半導体チップを嵌め合わせる貫通孔2を有していて、貫通孔2の下端部に前記半導体チップに面して切り込まれた空間13を有する半導体チップの位置決め治具とする。
【選択図】図1
Description
2 貫通孔
3、3a、3b、3c カーボン治具
4 半田板
5 絶縁回路基板
6 ボイド
7 半田飛沫
8 間隙
9、9a、9b 切り込み部
10 下端部
11 接触端部
12 切り込み部の高さ
13 空間
14 距離
15 金属放熱板
16 アルミワイヤ
17 樹脂枠
18 外部引き出し端子
Claims (9)
- 絶縁回路基板に設置された金属薄板上に半導体チップ半田付けする際に用いられる半導体チップの位置決め治具であって、
前記位置決め治具は、前記半導体チップを嵌め合わせる貫通孔を有していて、前記貫通孔の下端部に前記半導体チップに面して切り込まれた空間である切込み部を有することを特徴とする半導体チップの位置決め治具。 - 前記貫通孔の下端部に設けられる切り込み部の高さが、溶融半田の厚さ以上、半導体チップの上面以下であることを特徴とする請求項1記載の半導体チップの位置決め治具。
- 前記位置決め治具の主面に沿った方向の前記切り込み部の距離が、前記切り込み部の高さと同程度であることを特徴とする請求項1乃至2記載の半導体チップの位置決め治具。
- 前記切り込み部が貫通孔の全周に設けられていることを特徴とする請求項1乃至3記載の半導体チップの位置決め治具。
- 前記切り込み部が前記貫通孔の下端部の面取り加工により形成されていることを特徴とする請求項1乃至4記載の半導体チップの位置決め治具。
- 前記半導体チップの位置決め治具の厚さが半田板と半導体チップの厚さの合計よりも厚いことを特徴とする請求項1乃至5記載の半導体チップの位置決め治具。
- 前記半導体チップの位置決め治具がカーボンを主材料としていることを特徴とする請求項1乃至6記載の半導体チップの位置決め治具。
- 金属放熱板上に、その一方の面に半田板を挟んで絶縁回路基板を載せ、該絶縁回路基板のもう一方の面に半導体チップの位置決め治具を載置し固定し、前記位置決め治具の貫通孔であってその貫通孔の下端部に前記半導体チップに面して切り込まれた空間を有する貫通孔に半田板と半導体チップをセットし、減圧下で前記半田板の熔融温度以上に加熱して、前記金属放熱板、絶縁回路基板及び半導体チップとをそれぞれ半田接合する工程を有することを特徴とする半導体装置の製造方法。
- 前記半導体チップが絶縁ゲート型バイポーラトランジスタチップおよびダイオードチップであることを特徴とする請求項8記載の半導体装置の製造方法。
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JP2011202923A JP5853525B2 (ja) | 2011-09-16 | 2011-09-16 | 半導体チップの位置決め治具及び半導体装置の製造方法 |
CN201210342534.3A CN103000559B (zh) | 2011-09-16 | 2012-09-14 | 半导体芯片的定位夹具以及半导体装置的制造方法 |
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Cited By (4)
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JP2016111255A (ja) * | 2014-12-09 | 2016-06-20 | 三菱電機株式会社 | 半導体装置の製造方法 |
JP2019036653A (ja) * | 2017-08-17 | 2019-03-07 | 富士電機株式会社 | 半導体装置の製造方法及びはんだ付け補助治具 |
US10843300B2 (en) | 2015-09-30 | 2020-11-24 | Origin Company, Limited | Method for producing soldered product |
CN113287373A (zh) * | 2019-01-10 | 2021-08-20 | 株式会社电装 | 半导体装置及其制造方法 |
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CN103453924A (zh) * | 2013-09-18 | 2013-12-18 | 镇江艾科半导体有限公司 | 半导体芯片测试底板 |
CN104332415B (zh) * | 2014-11-07 | 2017-02-15 | 无锡中微高科电子有限公司 | 一种半导体芯片的安装定位方法及定位制具 |
CN104599990A (zh) * | 2015-01-13 | 2015-05-06 | 中国科学院半导体研究所 | Led共晶焊方法 |
CN104900575B (zh) * | 2015-06-23 | 2018-11-20 | 上海航天电子通讯设备研究所 | 真空共晶焊的芯片定位夹具、制造方法及芯片转运方法 |
TWI642133B (zh) * | 2016-10-20 | 2018-11-21 | 矽品精密工業股份有限公司 | 電子構件之置放製程及其應用之承載治具 |
CN111630644B (zh) * | 2018-03-02 | 2023-07-14 | 新电元工业株式会社 | 半导体装置及其制造方法 |
CN109576676B (zh) * | 2018-12-25 | 2023-12-29 | 西安立芯光电科技有限公司 | 一种用于半导体激光器侧腔面镀膜的夹具 |
JP7050718B2 (ja) * | 2019-05-16 | 2022-04-08 | 三菱電機株式会社 | はんだ付け用位置決め治具 |
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JP2007194477A (ja) * | 2006-01-20 | 2007-08-02 | Toyota Industries Corp | 位置決め治具、位置決め方法、半導体モジュールの製造方法及び半田付け装置 |
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CN101150076A (zh) * | 2006-09-21 | 2008-03-26 | 矽品精密工业股份有限公司 | 半导体封装件制法与半导体元件定位结构及方法 |
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Cited By (7)
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JP2016111255A (ja) * | 2014-12-09 | 2016-06-20 | 三菱電機株式会社 | 半導体装置の製造方法 |
US10843300B2 (en) | 2015-09-30 | 2020-11-24 | Origin Company, Limited | Method for producing soldered product |
JP2019036653A (ja) * | 2017-08-17 | 2019-03-07 | 富士電機株式会社 | 半導体装置の製造方法及びはんだ付け補助治具 |
US10566308B2 (en) | 2017-08-17 | 2020-02-18 | Fuji Electric Co., Ltd. | Semiconductor device manufacturing method and soldering support jig |
US11164846B2 (en) | 2017-08-17 | 2021-11-02 | Fuji Electric Co., Ltd. | Semiconductor device manufacturing method and soldering support jig |
JP7013717B2 (ja) | 2017-08-17 | 2022-02-01 | 富士電機株式会社 | 半導体装置の製造方法及びはんだ付け補助治具 |
CN113287373A (zh) * | 2019-01-10 | 2021-08-20 | 株式会社电装 | 半导体装置及其制造方法 |
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