JP2010021515A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP2010021515A JP2010021515A JP2009006240A JP2009006240A JP2010021515A JP 2010021515 A JP2010021515 A JP 2010021515A JP 2009006240 A JP2009006240 A JP 2009006240A JP 2009006240 A JP2009006240 A JP 2009006240A JP 2010021515 A JP2010021515 A JP 2010021515A
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- semiconductor device
- wiring board
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- substrate
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Abstract
【解決手段】配線基板2の貫通孔3内に配置された放熱板4上に半導体チップ5が搭載され、半導体チップ5の電極5aと配線基板2の接続端子17とがボンディングワイヤ6で接続され、半導体チップ5およびボンディングワイヤ6を覆うように配線基板2の上面2a上に封止樹脂7が形成され、配線基板2の下面2bに半田ボール8が形成されて半導体装置1が構成されている。放熱板4の厚みは配線基板2の厚みよりも厚い。放熱板4は、その上面9aの周縁部において、放熱板4の側面から外側に突出する突出部11を有し、突出部11は貫通孔3外の配線基板2の上面2a上に位置し、突出部11の下面は配線基板2の上面2aに接触している。半導体装置1を製造する際には、配線基板2の上面2a側から配線基板2の貫通孔3内に放熱板4が挿入される。
【選択図】図1
Description
本発明の一実施の形態の半導体装置およびその製造方法(製造工程)を図面を参照して説明する。
図48および図49は、本実施の形態2の半導体装置1aの断面図(側面断面図)であり、図50は、封止樹脂7を透視したときの半導体装置1aの平面透視図(上面図)であり、図51は半導体装置1aの下面図(底面図、裏面図、平面図)である。図50および図51のA7−A7線の断面が、図48にほぼ対応し、図50および図51のA8−A8線の断面が、図49にほぼ対応する。また、図52および図53は、半導体装置1aに使用されている放熱板4aの断面図(側面断面図)であり、図54は、半導体装置1aに使用されている放熱板4aの上面図(平面図)であり、図55は半導体装置1aに使用されている放熱板4aの下面図(平面図)である。図54および図55のA9−A9線の断面が、図52に対応し、図54および図55のA10−A10線の断面が、図53に対応するが、図52と図48とは同じ断面位置が示され、図53と図49とは同じ断面位置が示されている。また、図56は、半導体装置1aに使用されている配線基板2の断面図(側面断面図)であり、図57は、半導体装置1aに使用されている配線基板2の上面図(平面図)である。図57のA11−A11線の断面が、図56に対応するが、図56と図48とは同じ断面位置が示されている。なお、図57は、平面図であるが、配線基板2における貫通孔3の位置および形状が分かりやすいように、配線基板2およびその上面2aの接続端子17にハッチングを付してある。また、図50において、封止樹脂7を透視しても放熱板4aで隠れて見えない配線基板2の貫通孔3の位置を、理解を簡単にするために点線で示してある。
図72は、本実施の形態3の半導体装置1bの断面図(側面断面図)であり、上記実施の形態1の図1や上記実施の形態2の図48または図49に対応するものである。
上記実施の形態1,2では、個片化した放熱板4,4aを配線基板21の貫通孔3内に配置して半導体装置1,1aを製造していたが、本実施の形態では、複数の放熱板4cが連結された状態で樹脂封止工程まで行ってから、封止体を個片化することで、半導体装置1cを製造する。
上記実施の形態4では、複数の放熱板4cが連結されたフレーム31bと多連の配線基板とを固定して半導体装置を製造していたが、本実施の形態では、複数の放熱板4cが連結されたフレーム31cに個片化された配線基板2fを固定して半導体装置を製造する。
図152は、本実施の形態6の半導体装置1fの断面図(側面断面図)であり、上記実施の形態1の図1に対応するものである。
図163は、本実施の形態7の半導体装置1gの断面図(側面断面図)である。
2,2f 配線基板
2a 上面
2b 下面
3 貫通孔
4,4a,4b,4c,4d 放熱板
5,5e,5f 半導体チップ
5a,5d 電極
5b 表面
5c 裏面
6,6a ボンディングワイヤ
7,7a 封止樹脂
7b 上面
8 半田ボール
9a,9c 上面
9b,9d 下面
10 側面(側壁)
11,11a,11b 突出部
12,12a 下面
13,13c,13e ピン部
13a 側壁
13b,13d 先端部
14 接着材
14a 半田
14b 銀ペースト
15,15a 孔部
16 基材層
17 接続端子
18 ランド
19 ソルダレジスト層
21,21c,21d 配線基板
21a 上面
21b 下面
22 半導体装置領域
23 単位領域
24 封止体
25 ワッシャ状またはリング状の部材
26 スリーブ
31,31a,31b,31c フレーム
32 フレーム枠
33,33a 連結部
33b 幅広部
34 連結部
41 配線基板
41a 上面
42,42a 基板側端子
43 半田
51 接着材
55 側面
61 放熱板
61a 上面
62 接着材
63 放熱用フィン
64 接着材
71 溝
72 ステージ
72a 溝
73 治具
74 矢印
DL 切断位置
L1,L2,L3 寸法
t1,t2 厚み
W1 幅
α 角度
Claims (44)
- (a)第1の主面と前記第1の主面とは反対側の第2の主面とを有する基板であって、前記第1の主面から前記第2の主面に到達する貫通孔と、前記第1の主面において前記貫通孔の周囲に形成された複数の第1電極と、前記第2の主面において前記貫通孔の周囲に形成された複数の第2電極と、前記貫通孔内に配置された放熱板とを有する前記基板、
(b)複数の第3電極が形成された第3の主面を有し、前記放熱板の上面上に搭載された半導体チップ、
(c)前記半導体チップの前記複数の第3電極と前記基板の前記複数の第1電極とをそれぞれ電気的に接続する複数の導電性ワイヤ、
(d)前記半導体チップおよび前記複数の導電性ワイヤを封止する封止部、および、
(e)前記基板の前記複数の第2電極上にそれぞれ形成された複数の外部端子、
を有し、
前記放熱板の厚みは、前記基板の厚みよりも厚く、
前記放熱板は、前記放熱板の前記上面の周縁部において、前記放熱板の側面から外側に突出する突出部を有し、
前記突出部は前記貫通孔外の前記基板の前記第1の主面上に位置し、前記突出部の下面は前記基板の前記第1の主面に接触していることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記放熱板は、金属材料により形成されていることを特徴とする半導体装置。 - 請求項2記載の半導体装置において、
前記放熱板は、銅を主成分とする金属材料により形成されていることを特徴とする半導体装置。 - 請求項3記載の半導体装置において、
前記突出部は、前記放熱板と一体的に形成されていることを特徴とする半導体装置。 - 請求項4記載の半導体装置において、
前記放熱板の側壁は、テーパ形状を有していることを特徴とする半導体装置。 - 請求項5記載の半導体装置において、
前記放熱板の前記側壁は、前記基板の前記貫通孔の内壁に密着していることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記突出部は、前記突出部の下面に形成されたピン部を有しており、
前記基板は、前記ピン部が挿入された孔部を有していることを特徴とする半導体装置。 - 請求項7記載の半導体装置において、
前記ピン部はテーパ形状を有していることを特徴とする半導体装置。 - 請求項8記載の半導体装置において、
前記ピン部の側壁は、前記基板の前記孔部の内壁に密着していることを特徴とする半導体装置。 - 請求項7記載の半導体装置において、
前記孔部は、前記基板を貫通するように形成されており、
前記ピン部は、前記基板の前記孔部内に固定されていることを特徴とする半導体装置。 - 請求項7記載の半導体装置において、
前記ピン部は、その先端部が前記基板の前記第2の主面から突出し、前記ピン部の前記第2の主面から突出した部分が押しつぶされていることを特徴とする半導体装置。 - 請求項11記載の半導体装置において、
前記ピン部の側壁と前記基板の前記孔部の内壁との間に、スリーブが介在していることを特徴とする半導体装置。 - 請求項12記載の半導体装置において、
前記スリーブは、前記放熱板と同じ材料により形成されていることを特徴とする半導体装置。 - 請求項11記載の半導体装置において、
前記ピン部の先端部が貫通するように、前記基板の前記第2の主面上にワッシャ状またはリング状の第1部材が配置され、
前記ピン部の前記第1部材から突出した部分が押しつぶされていることを特徴とする半導体装置。 - 請求項14記載の半導体装置において、
前記第1部材は、前記放熱板と同じ材料により形成されていることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記基板は、多層配線基板であることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記半導体チップの前記第3の主面上に搭載された他の放熱板を更に有し、
前記封止部は、前記半導体チップ、前記複数の導電性ワイヤおよび前記他の放熱板を封止し、
前記他の放熱板の上面が前記封止部の上面から露出されていることを特徴とする半導体装置。 - 請求項17記載の半導体装置において、
前記他の放熱板は、前記放熱板と同じ材料により形成されていることを特徴とする半導体装置。 - 請求項17記載の半導体装置において、
前記封止部の上面から露出する前記他の放熱板の上面に、放熱用フィンが取り付けられていることを特徴とする半導体装置。 - (a)放熱板を準備する工程であって、
前記放熱板の上面の周縁部において、前記放熱板の側面から外側に突出する突出部を有する前記放熱板を準備する工程、
(b)第1の主面と前記第1の主面とは反対側の第2の主面とを有する基板を準備する工程であって、
前記第1の主面から前記第2の主面に到達する貫通孔と、前記第1の主面において前記貫通孔の周囲に形成された複数の第1電極と、前記第2の主面において前記貫通孔の周囲に形成された複数の第2電極とを有する前記基板を準備する工程、
(c)前記突出部が前記貫通孔外の前記基板の前記第1の主面上に位置し、前記突出部の下面が前記基板の前記第1の主面に接触するように、前記基板の前記貫通孔内に前記放熱板を配置する工程、
(d)複数の第3電極が形成された第3の主面を有する半導体チップを、前記放熱板の上面上に搭載する工程、
(e)前記半導体チップの前記複数の第3電極と前記基板の前記複数の第1電極とを複数の導電性ワイヤを介して電気的に接続する工程、
(f)前記半導体チップおよび前記複数の導電性ワイヤを樹脂で封止する工程、および、
(g)前記基板の前記複数の第2電極上に複数の外部端子をそれぞれ形成する工程、
を有し、
前記(c)工程では、前記放熱板は、前記基板の前記第1の主面側から、前記貫通孔内に挿入されることを特徴とする半導体装置の製造方法。 - 請求項20記載の半導体装置の製造方法において、
前記放熱板の厚みは前記基板の厚みよりも厚いことを特徴とする半導体装置の製造方法。 - 請求項20記載の半導体装置の製造方法において、
前記(c)工程の後で、前記(d)工程が行われることを特徴とする半導体装置の製造方法。 - 請求項22記載の半導体装置の製造方法において、
前記(d)工程では、銀ペーストを介して前記半導体チップが前記放熱板の上面上に搭載されて接合されることを特徴とする半導体装置の製造方法。 - 請求項20記載の半導体装置の製造方法において、
前記(c)工程の前に、前記(d)工程が行われ、
前記(c)工程では、前記半導体チップが搭載された前記放熱板を、前記基板の前記貫通孔内に配置することを特徴とする半導体装置の製造方法。 - 請求項24記載の半導体装置の製造方法において、
前記(d)工程では、第1半田を介して前記半導体チップが前記放熱板の上面上に搭載されて接合されることを特徴とする半導体装置の製造方法。 - 請求項25記載の半導体装置の製造方法において、
前記(g)工程で形成された前記複数の外部端子は第2半田からなり、
前記(d)工程で用いた前記第1半田の融点は、前記第2半田の融点よりも高いことを特徴とする半導体装置の製造方法。 - 請求項20記載の半導体装置の製造方法において、
前記放熱板の側壁はテーパ形状を有し、
前記(c)工程で、前記基板の前記貫通孔内に挿入された前記放熱板は、その側壁が前記基板の前記貫通孔の内壁に密着して固定されることを特徴とする半導体装置の製造方法。 - 請求項21記載の半導体装置の製造方法において、
前記(a)工程で準備された前記放熱板の前記突出部の下面にはピン部が形成されており、
前記(b)工程で準備された前記基板は、前記ピン部を挿入するための孔部を有しており、
前記(c)工程では、前記放熱板が前記基板の前記貫通孔に挿入されるとともに、前記ピン部が前記基板の前記孔部に挿入されることを特徴とする半導体装置の製造方法。 - 請求項28記載の半導体装置の製造方法において、
前記ピン部はテーパ形状を有していることを特徴とする半導体装置の製造方法。 - 請求項21記載の半導体装置の製造方法において、
前記孔部は、前記基板を貫通するように形成されており、
前記(c)工程は、
(c1)前記基板の前記第1の主面側から、前記放熱板を前記基板の前記貫通孔に挿入するとともに、前記ピン部を前記基板の前記孔部に挿入する工程、
(c2)前記(c1)工程の後、前記ピン部の前記第2の主面から突出した部分を押しつぶす工程、
を有することを特徴とする半導体装置の製造方法。 - 請求項30記載の半導体装置の製造方法において、
前記(c2)工程では、前記ピン部の側壁と前記基板の前記孔部の内壁との間にスリーブを介在させてから、前記ピン部の前記第2の主面から突出した部分を押しつぶすことを特徴とする半導体装置の製造方法。 - 請求項31記載の半導体装置の製造方法において、
前記スリーブは、前記放熱板と同じ材料により形成されていることを特徴とする半導体装置の製造方法。 - 請求項30記載の半導体装置の製造方法において、
前記(c2)工程では、前記ピン部の先端部が貫通するように前記基板の前記第2の主面上にワッシャ状またはリング状の第1部材を配置してから、前記ピン部の前記第1部材から突出した部分を押しつぶすことを特徴とする半導体装置の製造方法。 - 請求項33記載の半導体装置の製造方法において、
前記第1部材は、前記放熱板と同じ材料により形成されていることを特徴とする半導体装置の製造方法。 - (a)第1の主面と前記第1の主面とは反対側の第2の主面とを有する基板であって、前記第1の主面から前記第2の主面に到達する貫通孔と、前記第1の主面において前記貫通孔の周囲に形成された複数の第1電極と、前記第2の主面において前記貫通孔の周囲に形成された複数の第2電極と、前記貫通孔内に配置された放熱板とを有する前記基板を準備する工程、
(b)複数の第3電極が形成された第3の主面を有する半導体チップを、前記放熱板の上面上に搭載する工程、
(c)前記半導体チップの前記複数の第3電極と前記基板の前記複数の第1電極とを複数の導電性ワイヤを介して電気的に接続する工程、
(d)前記半導体チップおよび前記複数の導電性ワイヤを樹脂で封止する工程、および、
(e)前記基板の前記複数の第2電極上に複数の外部端子をそれぞれ形成する工程、
を有し、
前記(a)工程で準備された前記基板では、
前記放熱板の厚みは、前記基板の厚みよりも厚く、
前記放熱板は、前記放熱板の前記上面の周縁部において、前記放熱板の側面から外側に突出する突出部を有し、
前記突出部は前記貫通孔外の前記基板の前記第1の主面上に位置し、前記突出部の下面は前記基板の前記第1の主面に接触していることを特徴とする半導体装置の製造方法。 - (a)複数の放熱板がそれぞれ連結部でフレーム枠に連結されたフレームを準備する工程、
(b)第1の主面と前記第1の主面とは反対側の第2の主面とを有する基板を準備する工程であって、
前記第1の主面から前記第2の主面に到達する複数の貫通孔と、前記第1の主面において前記各貫通孔の周囲に形成された複数の第1電極と、前記第2の主面において前記各貫通孔の周囲に形成された複数の第2電極とを有する前記基板を準備する工程、
(c)複数の第3電極が形成された第3の主面をそれぞれ有する複数の半導体チップを、前記フレームの前記複数の放熱板の上面上にそれぞれ搭載する工程、
(d)前記フレームを前記基板の前記第1の主面上に配置し、前記基板の前記各貫通孔内に前記各放熱板を挿入する工程、
(e)前記複数の半導体チップの前記複数の第3電極と前記基板の前記複数の第1電極を、複数の導電性ワイヤを介して電気的に接続する工程、
(f)前記基板の前記第1の主面上に、前記複数の半導体チップおよび前記複数の導電性ワイヤを封止する封止樹脂部を形成する工程、
(g)前記基板の前記複数の第2電極上に複数の外部端子をそれぞれ形成する工程、
(h)前記基板と前記基板の前記第1の主面上の前記フレームおよび前記封止樹脂部とを切断する工程、
を有することを特徴とする半導体装置の製造方法。 - 請求項36記載の半導体装置の製造方法において、
前記(f)工程では、前記基板の前記貫通孔の内壁と前記放熱板の側壁との間に、前記封止樹脂部の一部が形成されることを特徴とする半導体装置の製造方法。 - 請求項36記載の半導体装置の製造方法において、
前記(d)工程では、接着材を用いて、前記フレームが前記基板に固定されることを特徴とする半導体装置の製造方法。 - 請求項36記載の半導体装置の製造方法において、
前記(a)工程で準備された前記フレームの下面にはピン部が形成されており、
前記(b)工程で準備された前記基板は、前記ピン部を挿入するための孔部を有しており、
前記(d)工程では、前記フレームの前記ピン部が前記基板の前記孔部に挿入されて固定されることを特徴とする半導体装置の製造方法。 - 請求項39記載の半導体装置の製造方法において、
前記ピン部はテーパ形状を有していることを特徴とする半導体装置の製造方法。 - (a)複数の放熱板がそれぞれ連結部でフレーム枠に連結されたフレームを準備する工程、
(b)第1の主面と前記第1の主面とは反対側の第2の主面とを有する基板を複数準備する工程であって、
ここで、前記各基板は、前記第1の主面から前記第2の主面に到達する貫通孔と、前記第1の主面において前記貫通孔の周囲に形成された複数の第1電極と、前記第2の主面において前記貫通孔の周囲に形成された複数の第2電極とを有し、
(c)複数の第3電極が形成された第3の主面をそれぞれ有する複数の半導体チップを、前記フレームの前記複数の放熱板の上面上にそれぞれ搭載する工程、
(d)前記各基板の前記第1の主面側から前記各基板の前記貫通孔内に前記各放熱板が挿入されるように、前記フレームと前記複数の基板を固定する工程、
(e)前記各半導体チップの前記複数の第3電極と前記各基板の前記複数の第1電極を、複数の導電性ワイヤを介して電気的に接続する工程、
(f)前記各基板の前記第1の主面上に、その上の前記半導体チップおよび前記複数の導電性ワイヤを封止するように、封止樹脂部を形成する工程、
(g)前記各基板の前記複数の第2電極上に複数の外部端子をそれぞれ形成する工程、
(h)前記封止樹脂部から突出する前記フレームを切断する工程、
を有することを特徴とする半導体装置の製造方法。 - 請求項41記載の半導体装置の製造方法において、
前記(f)工程では、前記各基板の前記貫通孔の内壁と前記各放熱板の側壁との間に、前記封止樹脂部の一部が形成されることを特徴とする半導体装置の製造方法。 - 請求項42記載の半導体装置の製造方法において、
前記(f)工程では、前記各基板の側壁上も前記封止樹脂部で覆われることを特徴とする半導体装置の製造方法。 - 請求項41記載の半導体装置の製造方法において、
前記(d)工程では、接着材を用いて、前記フレームが前記各基板に固定されることを特徴とする半導体装置の製造方法。
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Also Published As
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US20120061817A1 (en) | 2012-03-15 |
US8232634B2 (en) | 2012-07-31 |
US20090309213A1 (en) | 2009-12-17 |
JP5155890B2 (ja) | 2013-03-06 |
US7923826B2 (en) | 2011-04-12 |
US20110163438A1 (en) | 2011-07-07 |
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