JP4957649B2 - はんだ接合体およびその製造方法 - Google Patents
はんだ接合体およびその製造方法 Download PDFInfo
- Publication number
- JP4957649B2 JP4957649B2 JP2008126930A JP2008126930A JP4957649B2 JP 4957649 B2 JP4957649 B2 JP 4957649B2 JP 2008126930 A JP2008126930 A JP 2008126930A JP 2008126930 A JP2008126930 A JP 2008126930A JP 4957649 B2 JP4957649 B2 JP 4957649B2
- Authority
- JP
- Japan
- Prior art keywords
- solder
- film
- composite
- coating
- soldering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83909—Post-treatment of the layer connector or bonding area
- H01L2224/83951—Forming additional members, e.g. for reinforcing, fillet sealant
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10156—Shape being other than a cuboid at the periphery
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Die Bonding (AREA)
Description
第1のはんだ(51)と第2のはんだ(52)とは同一材料であり、被膜(60)の形成にあたっては、第1のはんだ(51)の周辺部の表面を熱処理して酸化させることにより、酸化膜を形成し、当該酸化膜を被膜(60)とすることを特徴とする。
第1のはんだ(51)と第2のはんだ(52)とは同一材料であり、被膜(60)は、第1のはんだ(51)の周辺部の表面を熱処理して酸化させることにより形成された厚さ3nm以上の酸化膜であることを特徴としている。
図1は、本発明の第1実施形態に係るはんだ接合体を示す図であり、(a)は概略断面図、(b)は(a)の上視平面図である。
図5は、本発明の第2実施形態に係るはんだ接合体の製造方法を示す工程図であり、工程順にワークの概略断面を示している。本実施形態の製造方法では、上記第1実施形態と比べて被膜形成方法が相違するものであり、ここでは、この相違点を中心に述べることとする。
図6は、本発明の第3実施形態に係るはんだ接合体の製造方法を示す工程図であり、図7は、図6に続くはんだ接合体の製造方法を示す工程図である。ここでも、工程順にワークの概略断面を示している。
なお、上記第2実施形態および上記第3実施形態のような樹脂よりなる被膜60は、上記第1実施形態のような酸化膜としての被膜60に比べて長期的な信頼性が劣ることが予想される。しかし、長期信頼性が不要な場合には、これら樹脂よりなる被膜60であってもよい。
20 第2の部材としてのヒートシンク
30 第3の部材としての基板
40 複合体
51 第1のはんだ
52 第2のはんだ
60 被膜
60a 樹脂
Claims (2)
- 第1の部材(10)と第2の部材(20)とを、第1のはんだ(51)を介して重ね合わせ、前記第1のはんだ(51)を加熱して溶融させることにより、前記第1の部材(10)と前記第2の部材(20)とがはんだ接合された複合体(40)を形成する第1のはんだ付け工程と、
前記複合体(40)と第3の部材(30)とを、第2のはんだ(52)を介して重ね合わせ、前記第2のはんだ(52)を加熱して溶融させることにより、前記複合体(40)と前記第3の部材(30)とをはんだ接合する第2のはんだ付け工程とを備えるはんだ接合体の製造方法において、
前記第1のはんだ付け工程では、前記第1のはんだ(51)の面積を前記第1の部材(10)の被接合面の面積よりも大きくすることにより、前記第1のはんだ(51)の周辺部が前記第1の部材(10)の外周からはみ出すように、前記第1の部材(10)と前記第2の部材(20)との重ね合わせを行い、
続いて前記第1のはんだ(51)の加熱を行って前記複合体(40)を形成するとともに、前記第1の部材(10)の外周からはみ出している前記第1のはんだ(51)の周辺部に、当該周辺部の表面を被覆し且つ前記第2のはんだ付け工程における前記第2のはんだ(52)の加熱温度よりも高い融点を有する被膜(60)を形成し、
その後、前記被膜(60)によって前記第1の部材(10)の外周側への動きを拘束した状態で、前記第2のはんだ付け工程を行うものであり、
前記第1のはんだ(51)と前記第2のはんだ(52)とは同一材料であり、
前記被膜(60)の形成にあたっては、前記第1のはんだ(51)の周辺部の表面を熱処理して酸化させることにより、厚さ3nm以上の酸化膜を形成し、当該酸化膜を前記被膜(60)とすることを特徴とするはんだ接合体の製造方法。 - 第1の部材(10)と第2の部材(20)とが、第1のはんだ(51)を介して重ね合わせられてはんだ接合された複合体(40)を備え、
この複合体(40)と第3の部材(30)とが、第2のはんだ(52)を介して重ね合わせられてはんだ接合されてなるはんだ接合体において、
前記第1のはんだ(51)の面積は前記第1の部材(10)の被接合面の面積よりも大きく、前記第1のはんだ(51)の周辺部が前記第1の部材(10)の外周からはみ出しており、
前記第1の部材(10)の外周からはみ出している前記第1のはんだ(51)の周辺部には、当該周辺部の表面を被覆し且つ前記第2のはんだ(52)のはんだ接合時の加熱温度よりも高い融点を有する被膜(60)が形成されており、
前記被膜(60)によって前記第1の部材(10)の外周側への動きが拘束されており、
前記第1のはんだ(51)と前記第2のはんだ(52)とは同一材料であり、
前記被膜(60)は、前記第1のはんだ(51)の周辺部の表面を熱処理して酸化させることにより形成された厚さ3nm以上の酸化膜であることを特徴とするはんだ接合体。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008126930A JP4957649B2 (ja) | 2008-05-14 | 2008-05-14 | はんだ接合体およびその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008126930A JP4957649B2 (ja) | 2008-05-14 | 2008-05-14 | はんだ接合体およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009277840A JP2009277840A (ja) | 2009-11-26 |
JP4957649B2 true JP4957649B2 (ja) | 2012-06-20 |
Family
ID=41443006
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008126930A Expired - Fee Related JP4957649B2 (ja) | 2008-05-14 | 2008-05-14 | はんだ接合体およびその製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4957649B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7338258B2 (ja) * | 2019-06-19 | 2023-09-05 | 株式会社レゾナック | 接合材評価方法、及び評価試験装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006073810A (ja) * | 2004-09-02 | 2006-03-16 | Toyota Motor Corp | パワー半導体モジュールおよびその製造方法 |
JP4259445B2 (ja) * | 2004-10-12 | 2009-04-30 | パナソニック株式会社 | 半田ペーストおよび半田接合方法 |
JP4525636B2 (ja) * | 2006-06-09 | 2010-08-18 | 株式会社日立製作所 | パワーモジュール |
JP4677968B2 (ja) * | 2006-09-29 | 2011-04-27 | 株式会社村田製作所 | はんだペーストおよび接合部品 |
JP2008235674A (ja) * | 2007-03-22 | 2008-10-02 | Toyota Motor Corp | パワーモジュール及び車両用インバータ |
-
2008
- 2008-05-14 JP JP2008126930A patent/JP4957649B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2009277840A (ja) | 2009-11-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4438489B2 (ja) | 半導体装置 | |
JP6206494B2 (ja) | 半導体装置 | |
JP4420001B2 (ja) | パワー半導体モジュール | |
JP5582040B2 (ja) | 半導体装置の製造方法、半導体装置およびイグナイタ装置 | |
JP2015185622A (ja) | 電子素子実装用基板及び電子装置 | |
JP5732880B2 (ja) | 半導体装置及びその製造方法 | |
JP4557804B2 (ja) | 半導体装置及びその製造方法 | |
JP6197619B2 (ja) | 電子装置及び電子装置の製造方法 | |
JP5261982B2 (ja) | 半導体装置及び半導体装置の製造方法 | |
WO2007138771A1 (ja) | 半導体装置、電子部品モジュールおよび半導体装置の製造方法 | |
JP2006269970A (ja) | 電子部品のはんだ接合方法 | |
JP7013717B2 (ja) | 半導体装置の製造方法及びはんだ付け補助治具 | |
JP4957649B2 (ja) | はんだ接合体およびその製造方法 | |
JP2008235531A (ja) | 気密封止用パッケージおよび接続構造 | |
JP2008135613A (ja) | 半導体装置の製造方法 | |
JP2004119944A (ja) | 半導体モジュールおよび実装基板 | |
JP4946959B2 (ja) | 半導体装置の製造方法 | |
JP6201297B2 (ja) | 銅板付きパワーモジュール用基板及び銅板付きパワーモジュール用基板の製造方法 | |
JP2013093507A (ja) | 半導体チップを3次元積層アセンブリへと多段に形成していく、はんだ接合プロセス | |
JP2017188528A (ja) | 半導体装置 | |
JP5763467B2 (ja) | 電子装置の製造方法及び電子装置 | |
JP6698879B2 (ja) | 半導体装置、および半導体装置の製造方法 | |
JP2015018860A (ja) | 半導体パッケージの製造方法 | |
KR101891594B1 (ko) | 솔더일체형금속레이어, 이를 포함하는 솔더일체형pcb 및 솔더접합방법 | |
JP2006310415A (ja) | モジュール |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20100607 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20111214 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20111220 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120130 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120221 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120305 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150330 Year of fee payment: 3 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 4957649 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |