JP6619119B1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6619119B1 JP6619119B1 JP2019506739A JP2019506739A JP6619119B1 JP 6619119 B1 JP6619119 B1 JP 6619119B1 JP 2019506739 A JP2019506739 A JP 2019506739A JP 2019506739 A JP2019506739 A JP 2019506739A JP 6619119 B1 JP6619119 B1 JP 6619119B1
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- Prior art keywords
- semiconductor chip
- solder material
- lead
- semiconductor device
- solder
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- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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Abstract
Description
実施形態に係る半導体装置1は、図1に示すように、基板2と、半導体チップ3と、リード4(4a,4b,4c)と、はんだ5,6と、ワイヤ7とを備え、リード4a,4b,4cの外部接続端子4d,4e,4f及び基板2の放熱性の金属板2dの一部を除いて樹脂8で樹脂封止されている。
エミッタ電極3bは、リード4bの電極接続片4gとはんだ6を介して接合されており、はんだ6及びリード4b(外部接続端子4e)を介して外部と接続される。
リード4aにおいては、一方の端部が、基板2の半導体チップ搭載面2bに形成された接続パッドを介してコレクタ電極3aと接続された基板2の回路2cと接続されており、他方の端部が、外部接続端子4dとなっている。
リード4bは、一方の端部にエミッタ電極3bと接続するための電極接続片4gを有し、他方の端部に外部と接続するための外部接続端子4eを有する。リード4bの電極接続片4gについては、半導体装置1の全体的な構成を説明した後で、詳しく説明する。
リード4cは、一方の端部がワイヤ7を介してゲート電極3cと接続されており、他方の端部が外部接続端子4fとなっている。
はんだ5は、コレクタ電極3aと半導体チップ搭載面2bに形成された電極パッドとを接合している。はんだ5は、フラックスを含有するペースト状のはんだ材(いわゆるクリームはんだ)からなり、印刷により基板2の半導体チップ搭載面2bに配置され、リフローして加熱することにより基板2と半導体チップ3とを接合する。なお、はんだ5は、はんだ6の場合と異なり、はんだに作用する応力(例えば熱応力)を緩和するという事情がなく、厚くなると導通損失が大きくなるため、ある程度薄い方が好ましい。
はんだ6は、エミッタ電極3bと電極接続片4gとを接合している。はんだ6の厚さ(はんだ厚)は、はんだ5(基板2と半導体チップ3との間のはんだ)の厚さよりも厚く、例えば、300μm以上であり、例えば500μmである。
リード4の電極接続片4gは、図3(a)および(b)に示すように、半導体チップ3に、はんだ6を介して電気的に接続された電極接続部41、および、平面的に見て、電極接続部41から外側に向けて突出した突出部42を含んでいる。
実施形態に係る半導体装置1の製造方法は、図4および図5に示すように、基板配置工程S1と、はんだ材印刷工程S2と、半導体チップ搭載工程S3と、はんだ材搭載工程S4と、リードフレーム配置工程S5と、はんだ接合工程S6と、ワイヤ接続工程S7と、樹脂封止工程S8と、リード加工工程S9とをこの順序で含む。
基板配置工程S1においては、水平面上に配置した受け台J1上に、半導体チップ搭載面2bを上方に向けて半導体チップ3を実装するための基板2を配置する(図5(a)参照。)。
はんだ材印刷工程S2においては、基板2の上面となる半導体チップ搭載面2b上にペースト状のはんだ材5(いわゆるクリームはんだ)を印刷する(図5(b)参照。)。
なお、実施形態においては、はんだ材5を印刷するが、ディスペンサによってはんだ材を供給する、はんだフィーダ等で送り出した糸はんだによってはんだ材を供給する、溶融したはんだ材を流し込むことによってはんだ材を供給する等、適宜の方法ではんだ材を供給してもよい。
半導体チップ搭載工程S3においては、半導体チップ搭載面2bと半導体チップ3のコレクタ電極3aとがはんだ材5を挟んで対向した状態となるように基板2の上面となる半導体チップ搭載面2b上に半導体チップ3を搭載する(図1(b),図5(c)参照。)。
はんだ材搭載工程S4においては、半導体チップ3のエミッタ電極3b上にはんだ材6を搭載する(図1(b),図5(d)参照。)。はんだ材6は、エミッタ電極3bと次の工程で搭載するリードフレーム9の電極接続片4gとを接合できるのに十分な厚さで搭載する。
なお、はんだ材6としては、ペースト状のはんだ材(いわゆるクリームはんだ)や固体状のはんだ材(いわゆる板はんだ)またはこれらを組み合わせて用いることができる。ペースト状のはんだ材を供給する方法としては様々な方法が考えられるが、はんだ量の細かい調整や正確な箇所に供給できるようディスペンサによってペースト状のはんだ材を供給することが好ましい。
リードフレーム配置工程S5においては、半導体チップ3上に搭載されているはんだ材6の上にリード4bの電極接続片4gを重ね合わせるようにして、リードフレーム9を配置する(図5(e)参照。)。このとき、リードフレーム9内のリード4bが所定の平面位置及び高さ位置に配置され、エミッタ電極3bと電極接続片4gとの間にはんだ材6を介在させた状態にする。またこのとき、張り出し部42b等のリード4bの一部が電極接続片4gの近傍(基板2および半導体チップ3の近傍)において受け具J2上に配置されることで、リードフレーム9が半導体チップ3と電極接続片4gとの間隔を一定に保たせた状態で受け台J1に支持されることが好ましい(図5(f)参照。)。またこのとき、周辺部9a等の広い範囲が受け具J3上に配置されることで、リードフレーム9が安定した状態で受け台J1に支持されることが好ましい(図5(f)参照。)。
はんだ接合工程S6においては、受け台J1によって半導体装置1の構成部材を所定の位置に配置した状態を保持したまま、はんだ材5,6を加熱することにより、基板2、半導体チップ3、およびリードフレーム9をはんだ接合する(図5(f)参照。)。より詳しくは、受け台J1によって保持した半導体装置1の構成部材を、リフロー炉(図示せず。)に入れて加熱し、はんだ材5、6を溶融した後で、はんだ材5、6を固化してはんだ(5,6)とする。これにより、基板2の半導体チップ搭載面2bと半導体チップ3のコレクタ電極3aとをはんだ5を介して接合すると共に、半導体チップ3のエミッタ電極3bとリード4bの電極接続片4gとをはんだ6を介して接合する。
はんだ接合した半導体装置の中間体1M(ワイヤ接続はされていない状態)において、ワイヤ接続工程S7(図示せず。)で、ゲート電極3cと、リード4cとをワイヤ7を用いて接続する。ワイヤ7は適宜のものを用いることができる。次に樹脂封止工程S8(図示せず。)で、リード4a,4b,4cの外部接続端子4d,4e,4fおよび放熱用の金属板2dを除いて樹脂8で樹脂封止する。次に、リード加工工程S9(図示せず。)で、リード4a,4b,4cをリードフレーム9から切り離すと共に、所定の箇所の折り曲げ等の加工を行う。
このようにして実施形態における半導体装置1を製造する。
実施形態の半導体装置1は、リード4a,4b,4cは、突出部42の半導体チップ20側の面に、リード4a,4b,4cの幅方向に沿って一方端から他方端まで横断するはんだ材流出防止用溝形成領域R2を有するため、製造時に、半導体チップ3とリード4との間のはんだ6を肉厚に形成したとしても、溶融したはんだ材6がリード4の幅方向Wと垂直な方向Lに幅のあるはんだ材流出防止用溝形成領域R2でしっかりと堰き止められる。しかも、このはんだ材流出防止用溝形成領域R2は、リード4の幅方向Wに沿って一方端から他方端まで横断しているため、この溶融したはんだ材6がリード4の表面を伝わる経路を遮断している。従って、半導体チップ3とリード4との間のはんだ6が肉厚に形成された場合であっても、製造時にリード4上の所望しない場所へはんだ材6が流出することを防止することができる。
なお、実施形態1においては、はんだ材流出防止用溝形成領域R2全体ではんだ材の流出を防止するため、溶融したはんだ6がリード4の表面を伝わって流出することを、広い範囲でしっかり防止することが可能となる。また、各はんだ材流出防止用溝44は、毛細管現象で内部圧力が低くなり、多少はんだ材6がはんだ材流出防止用溝44から溢れてもはんだ材6をはんだ材流出防止用溝44上に留めるため、はんだ材流出防止用溝44入り込んだはんだ材のみならず、はんだ材流出防止用溝44周りにおいてもはんだ材6の流出を防止する。
次に、はんだ材流出防止用溝形成領域R2における溝パターンの変形例1〜3を説明する。なお、図2に示すはんだ材流出防止用溝形成領域R2と同等の機能を有する部分について、同じ符号を付して説明する。
Claims (10)
- 半導体チップと、
前記半導体チップにはんだを介して電気的に接続された電極接続部、および、平面的に見て前記電極接続部から外側に向けて突出した突出部を含むリードとを備え、
前記リードは、外部接続端子をさらに含むと共に、前記突出部として、前記電極接続部から前記外部接続端子に向かって突出した外部接続端子連結部と、前記外部接続端子連結部とは異なる方向に突出した張り出し部とを有し、
前記張り出し部は、平面的に見て、前記半導体チップの外側まで突出し、先端部がどことも連結していないことを特徴とする半導体装置。 - 前記張り出し部は、平面的に見て、前記半導体チップが実装されている基板の外側まで突出していることを特徴とする請求項1に記載の半導体装置。
- 前記リードは、前記突出部の前記半導体チップ側の面に、前記リードの幅方向に沿って一方端から他方端まで横断するはんだ材流出防止用溝形成領域を有することを特徴とする請求項1または2に記載の半導体装置。
- 前記はんだ材流出防止用溝形成領域には、複数の溝が形成されていることを特徴とする請求項1〜3のいずれかに記載の半導体装置。
- 前記はんだ材流出防止用溝形成領域に形成されている各溝が、互いに平行をなすと共に平面的に見て前記幅方向に対して傾斜していることを特徴とする請求項4に記載の半導体装置。
- 前記はんだ材流出防止用溝形成領域に形成されている各溝が、互いに平行をなすと共に前記幅方向に沿って延びていることを特徴とする請求項4に記載の半導体装置。
- 前記リードは、前記電極接続部の前記半導体チップが接続された電極接続面に、全面にわたって複数の溝が形成された半導体チップ固定用溝形成領域をさらに有することを特徴とする請求項1〜6のいずれかに記載の半導体装置。
- 前記半導体チップ固定用溝形成領域には、前記複数の溝として第1方向に延びる溝の集まりである第1の半導体チップ固定用溝群と、前記第1方向と交差する第2方向に延びる溝の集まりである第2の半導体チップ固定用溝群とを有することを特徴とする請求項7に記載の半導体装置。
- 前記リードは、前記張り出し部に前記はんだ材流出防止用溝形成領域を有することを特徴とする請求項1〜8のいずれかに記載の半導体装置。
- 前記リードは、前記突出部の前記半導体チップ側とは反対側の面に、平面的に見て、はんだ材流出防止用溝形成領域と部分的に重なると共に複数の溝が形成された応力緩和用溝形成領域をさらに有することを特徴とする請求項1〜9のいずれかに記載の半導体装置。
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