JP6868982B2 - 隆起部が設けられている半導体を基板の基板位置に取り付けるための方法 - Google Patents

隆起部が設けられている半導体を基板の基板位置に取り付けるための方法 Download PDF

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JP6868982B2
JP6868982B2 JP2016156305A JP2016156305A JP6868982B2 JP 6868982 B2 JP6868982 B2 JP 6868982B2 JP 2016156305 A JP2016156305 A JP 2016156305A JP 2016156305 A JP2016156305 A JP 2016156305A JP 6868982 B2 JP6868982 B2 JP 6868982B2
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camera
substrate
positioning
bonding head
image
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JP2017050533A (ja
JP2017050533A5 (https=
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フローリアン スピア
フローリアン スピア
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Besi Switzerland AG
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0446—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0438—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0614—Marking devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
    • H10P72/32—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations
    • H10P72/3206—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H10P72/53—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment using optical controlling means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07173—Means for moving chips, wafers or other parts, e.g. conveyor belts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07178—Means for aligning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07221—Aligning
    • H10W72/07223—Active alignment, e.g. using optical alignment using marks or sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Wire Bonding (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP2016156305A 2015-08-31 2016-08-09 隆起部が設けられている半導体を基板の基板位置に取り付けるための方法 Active JP6868982B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
CH12482015 2015-08-31
CH01248/15 2015-08-31
CH01404/15A CH711536B1 (de) 2015-08-31 2015-09-28 Verfahren für die Montage von mit Bumps versehenen Halbleiterchips auf Substratplätzen eines Substrats.
CH01404/15 2015-09-28

Publications (3)

Publication Number Publication Date
JP2017050533A JP2017050533A (ja) 2017-03-09
JP2017050533A5 JP2017050533A5 (https=) 2019-09-05
JP6868982B2 true JP6868982B2 (ja) 2021-05-12

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JP2016156305A Active JP6868982B2 (ja) 2015-08-31 2016-08-09 隆起部が設けられている半導体を基板の基板位置に取り付けるための方法

Country Status (7)

Country Link
JP (1) JP6868982B2 (https=)
KR (1) KR102597252B1 (https=)
CN (1) CN106486400B (https=)
CH (1) CH711536B1 (https=)
MY (1) MY176667A (https=)
SG (1) SG10201606167WA (https=)
TW (1) TWI700767B (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7164314B2 (ja) * 2017-04-28 2022-11-01 ベシ スウィッツァーランド エージー 部品を基板上に搭載する装置及び方法
CN109079367B (zh) * 2018-07-23 2020-07-24 中电科技（合肥）博微信息发展有限责任公司 一种芯片智能焊接方法
JP7582928B2 (ja) * 2021-11-25 2024-11-13 キヤノン株式会社 接合装置および接合方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5372294A (en) * 1994-01-27 1994-12-13 Motorola, Inc. Method of preparing a component for automated placement
JP2833996B2 (ja) * 1994-05-25 1998-12-09 日本電気株式会社 フレキシブルフィルム及びこれを有する半導体装置
JPH10209208A (ja) * 1997-01-23 1998-08-07 Hitachi Ltd 半導体製造方法および装置
US7842599B2 (en) * 1997-05-27 2010-11-30 Wstp, Llc Bumping electronic components using transfer substrates
JP2001060795A (ja) * 1999-08-20 2001-03-06 Matsushita Electric Ind Co Ltd 電子部品実装装置
US7033842B2 (en) * 2002-03-25 2006-04-25 Matsushita Electric Industrial Co., Ltd. Electronic component mounting apparatus and electronic component mounting method
JP4334892B2 (ja) * 2003-03-20 2009-09-30 パナソニック株式会社 部品実装方法
JP4516354B2 (ja) * 2004-05-17 2010-08-04 パナソニック株式会社 部品供給方法
JP2007173801A (ja) * 2005-12-22 2007-07-05 Unaxis Internatl Trading Ltd フリップチップを基板に取り付ける方法
JP2008168225A (ja) * 2007-01-12 2008-07-24 Fujifilm Corp スリット塗布方法及び装置、並びにカラーフィルタの製造方法
CH698718B1 (de) * 2007-01-31 2009-10-15 Oerlikon Assembly Equipment Ag Vorrichtung für die Montage eines Flipchips auf einem Substrat.
CH698720B1 (de) * 2007-02-14 2009-10-15 Oerlikon Assembly Equipment Ag Verfahren und Montageautomat für die Montage von Halbleiterchips als Flipchip auf einem Substrat.
CH698334B1 (de) * 2007-10-09 2011-07-29 Esec Ag Verfahren für die Entnahme und Montage von auf einem Wafertisch bereitgestellten Halbleiterchips auf einem Substrat.
JP5030843B2 (ja) * 2008-04-14 2012-09-19 芝浦メカトロニクス株式会社 電子部品の実装装置及び実装方法
JP4983737B2 (ja) * 2008-06-30 2012-07-25 株式会社日立プラントテクノロジー ハンダボール検査リペア装置およびハンダボール検査リペア方法
JP4766144B2 (ja) * 2009-04-08 2011-09-07 パナソニック株式会社 電子部品実装装置
KR101120129B1 (ko) * 2009-08-31 2012-03-23 (주) 에스에스피 기준값을 응용한 작업위치 자동 조정방법 및 이를 위한 자동화 장비
JP2011181675A (ja) * 2010-03-01 2011-09-15 Nec Corp 回路部品の実装装置
CH705802B1 (de) * 2011-11-25 2016-04-15 Esec Ag Einrichtung für die Montage von Halbleiterchips.
JP6000626B2 (ja) * 2012-05-01 2016-10-05 新光電気工業株式会社 電子装置の製造方法及び電子部品搭載装置
JP6391225B2 (ja) * 2013-09-13 2018-09-19 ファスフォードテクノロジ株式会社 フリップチップボンダ及びフリップチップボンディング方法
JP6200737B2 (ja) * 2013-09-17 2017-09-20 ファスフォードテクノロジ株式会社 ダイボンダ用ディッピング機構及びフリップチップボンダ
JP2015076411A (ja) * 2013-10-04 2015-04-20 株式会社日立ハイテクインスツルメンツ ダイボンダ
JP6324772B2 (ja) * 2014-03-14 2018-05-16 ファスフォードテクノロジ株式会社 ダイボンダ用ディッピング機構及びフリップチップボンダ

Also Published As

Publication number Publication date
CH711536A1 (de) 2017-03-15
CN106486400A (zh) 2017-03-08
CN106486400B (zh) 2021-10-29
JP2017050533A (ja) 2017-03-09
TW201735227A (zh) 2017-10-01
CH711536B1 (de) 2019-02-15
KR102597252B1 (ko) 2023-11-01
MY176667A (en) 2020-08-19
KR20170026136A (ko) 2017-03-08
TWI700767B (zh) 2020-08-01
SG10201606167WA (en) 2017-03-30

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