JP6768843B2 - パワー半導体装置の製造方法およびパワー半導体装置 - Google Patents
パワー半導体装置の製造方法およびパワー半導体装置 Download PDFInfo
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- JP6768843B2 JP6768843B2 JP2018564066A JP2018564066A JP6768843B2 JP 6768843 B2 JP6768843 B2 JP 6768843B2 JP 2018564066 A JP2018564066 A JP 2018564066A JP 2018564066 A JP2018564066 A JP 2018564066A JP 6768843 B2 JP6768843 B2 JP 6768843B2
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Description
実施の形態1に係るパワー半導体装置の製造方法の一例について説明する。図1に示すように、まず、銅ベース板3が用意される。銅ベース板3では、銅板5aの上に樹脂絶縁部7を介在させて、複数の銅板5b、5c、5dが配置されている。銅板5b、5c、5dは、互いに電気的に絶縁されている。複数の銅板5b、5c、5dのそれぞれには、半導体素子がそれぞれ載置される。
実施の形態1では、1つの大容量中継基板を備えたパワー半導体装置の製造方法の一例について説明した。ここでは、2つの大容量中継基板を備えたパワー半導体装置の製造方法の一例について説明する。なお、実施の形態1において説明した部材と同一の部材については同一符号を付し、必要である場合を除きその説明を繰り返さないこととする。
ここでは、半導体素子等を覆うはんだの高さが異なるものを含むパワー半導体装置の製造方法の一例について説明する。なお、実施の形態1において説明した部材と同一の部材については同一符号を付し、必要である場合を除きその説明を繰り返さないこととする。
上述した各実施の形態では、はんだペースト15、17のパターンが、印刷によって形成される。すなわち、はんだペーストをメタルマスク51、55の開口部53、57に充填することによって、開口部53、57の開口形状とメタルマスク51、55の厚さとに対応したはんだペースト15、17のパターンが形成される。
Claims (14)
- 互いに電気的に絶縁された第1導体板および第2導体板を含むベース板を用意する工程と、
複数の第1開口部が形成された第1マスクを印刷マスクとして、前記複数の第1開口部のそれぞれに第1はんだペーストを充填することにより、前記第1導体板に接する第1はんだパターン第1部および前記第2導体板に接する第1はんだパターン第2部を形成する工程と、
前記第1はんだパターン第1部に第1半導体素子を載置し、前記第1はんだパターン第2部に第2半導体素子を載置する工程と、
複数の第2開口部が形成された第2マスクを他の印刷マスクとして、前記複数の第2開口部のそれぞれに第2はんだペーストを充填することにより、前記第1半導体素子に接する第2はんだパターン第1部および前記第2半導体素子に接する第2はんだパターン第2部を形成する工程と、
前記第2はんだパターン第1部および前記第2はんだパターン第2部に対して、外部接続端子が取り付けられた中継基板を配置する工程と、
前記中継基板が配置された後、熱処理を施す工程と
を備え、
前記第1半導体素子には信号パッドが形成されており、
前記第2はんだパターン第1部を形成する工程では、前記第2はんだパターン第1部は、前記信号パッドの上に形成される部分を含み、
前記第2はんだパターン第1部は円柱状に形成される、パワー半導体装置の製造方法。 - 前記第2はんだパターン第1部および前記第2はんだパターン第2部を形成する工程では、前記第2はんだパターン第1部の上面の位置と、前記第2はんだパターン第2部の上面の位置とは、同じ高さになる、請求項1記載のパワー半導体装置の製造方法。
- 前記中継基板を配置する工程では、
前記中継基板として、第1中継基板および第2中継基板が用いられ、
前記第2はんだパターン第1部に接するように前記第1中継基板が配置され、
前記第2はんだパターン第2部に接するように前記第2中継基板が配置される、請求項1または2に記載のパワー半導体装置の製造方法。 - 前記第1はんだペーストおよび前記第2はんだペーストのいずれかとして、ニッケルボール入りはんだが使用される、請求項1または2に記載のパワー半導体装置の製造方法。
- 互いに電気的に絶縁された第1導体板および第2導体板を含むベース板を用意する工程と、
複数の第1開口部が形成されたマスクを印刷マスクとして、前記複数の第1開口部のそれぞれに第1はんだペーストを充填することにより、前記第1導体板に接する第1はんだパターン第1部および前記第2導体板に接する第1はんだパターン第2部を形成する工程と、
前記第1はんだパターン第1部に第1半導体素子を直接載置し、前記第1はんだパターン第2部に第2半導体素子を直接載置する工程と、
前記第1半導体素子の第1上面および前記第2半導体素子の第2上面のそれぞれに、第2はんだペーストを塗布することにより、前記第1上面に第2はんだパターン第1部を形成し、前記第2上面に第2はんだパターン第2部を形成する工程と、
前記第2はんだパターン第1部および前記第2はんだパターン第2部に対して、外部接続端子が取り付けられた中継基板を配置する工程と、
前記中継基板が配置された後、熱処理を施す工程と
を備え、
前記中継基板を取り付ける工程では、前記中継基板は、前記第2はんだパターン第1部とは、前記外部接続端子を介在させて配置され、前記第2はんだパターン第2部とは直接接するように配置される、パワー半導体装置の製造方法。 - 前記第1はんだペーストおよび前記第2はんだペーストのいずれかとして、ニッケルボール入りはんだが使用される、請求項5記載のパワー半導体装置の製造方法。
- 互いに電気的に絶縁された第1導体板および第2導体板を含むベース板と、
前記第1導体板に対し、第1はんだパターン第1部によって接合された第1半導体素子と、
前記第2導体板に対し、第1はんだパターン第2部によって接合された第2半導体素子と、
前記第1半導体素子とは第2はんだパターン第1部によって接合され、前記第2半導体素子とは第2はんだパターン第2部によって接合された中継基板と、
前記中継基板に取り付けられた外部接続端子と
を備え、
前記第1半導体素子には信号パッドが形成されており、
前記第2はんだパターン第1部は、前記信号パッドの上に形成される部分を含み、
前記第2はんだパターン第1部は円柱状である、パワー半導体装置。 - 前記第1はんだパターン第1部および前記第1はんだパターン第2部のそれぞれは、同じ厚さを有する、請求項7記載のパワー半導体装置。
- 前記第2はんだパターン第1部の上面の位置と、前記第2はんだパターン第2部の上面の位置とは、同じ高さである、請求項7または8に記載のパワー半導体装置。
- 前記中継基板は、第1中継基板および第2中継基板を含み、
前記第1中継基板が、前記第2はんだパターン第1部によって前記第1半導体素子に接合され、
前記第2中継基板が、前記第2はんだパターン第2部によって前記第2半導体素子に接合された、請求項7または8に記載のパワー半導体装置。 - 前記第1はんだパターン第1部および前記第1はんだパターン第2部と、前記第2はんだパターン第1部および前記第2はんだパターン第2部との少なくともいずれかは、ニッケルボールを含む、請求項7または8に記載のパワー半導体装置。
- 互いに電気的に絶縁された第1導体板および第2導体板を含むベース板と、
前記第1導体板に対し、第1はんだパターン第1部によって接合された第1半導体素子と、
前記第2導体板に対し、第1はんだパターン第2部によって接合された第2半導体素子と、
前記第1半導体素子とは第2はんだパターン第1部によって接合され、前記第2半導体素子とは第2はんだパターン第2部によって接合された、外部接続端子が取り付けられた中継基板と
を備え、
前記中継基板は、前記第2はんだパターン第1部とは、前記外部接続端子を介在させて配置され、前記第2はんだパターン第2部とは、直接接続され、
前記第1半導体素子は、前記第1はんだパターン第1部に直接接続され、
前記第2半導体素子は、前記第1はんだパターン第2部に直接接続されている、パワー半導体装置。 - 前記第1はんだパターン第1部および前記第1はんだパターン第2部のそれぞれは、同じ厚さを有する、請求項12記載のパワー半導体装置。
- 前記第1はんだパターン第1部および前記第1はんだパターン第2部と、前記第2はんだパターン第1部および前記第2はんだパターン第2部との少なくともいずれかは、ニッケルボールを含む、請求項12または13に記載のパワー半導体装置。
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