JP6713878B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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JP6713878B2
JP6713878B2 JP2016164586A JP2016164586A JP6713878B2 JP 6713878 B2 JP6713878 B2 JP 6713878B2 JP 2016164586 A JP2016164586 A JP 2016164586A JP 2016164586 A JP2016164586 A JP 2016164586A JP 6713878 B2 JP6713878 B2 JP 6713878B2
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gate electrode
film
insulating film
region
semiconductor device
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JP2018032760A5 (https=
JP2018032760A (ja
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直 山口
直 山口
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Renesas Electronics Corp
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Renesas Electronics Corp
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Priority to JP2016164586A priority Critical patent/JP6713878B2/ja
Priority to US15/602,448 priority patent/US10186518B2/en
Priority to CN201710614700.3A priority patent/CN107785377B/zh
Priority to TW106127516A priority patent/TW201820590A/zh
Priority to KR1020170105955A priority patent/KR20180023831A/ko
Publication of JP2018032760A publication Critical patent/JP2018032760A/ja
Publication of JP2018032760A5 publication Critical patent/JP2018032760A5/ja
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US10872898B2 (en) * 2017-07-19 2020-12-22 Cypress Semiconductor Corporation Embedded non-volatile memory device and fabrication method of the same
JP2020155485A (ja) * 2019-03-18 2020-09-24 キオクシア株式会社 半導体装置およびその製造方法
TWI690061B (zh) * 2019-04-02 2020-04-01 億而得微電子股份有限公司 單閘極多次寫入非揮發性記憶體及其操作方法
JP7200054B2 (ja) * 2019-06-24 2023-01-06 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP2021027096A (ja) * 2019-08-01 2021-02-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP7555801B2 (ja) 2020-11-20 2024-09-25 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US12018364B2 (en) 2020-12-11 2024-06-25 Applied Materials, Inc. Super-conformal germanium oxide films
US11781218B2 (en) 2020-12-11 2023-10-10 Applied Materials, Inc. Defect free germanium oxide gap fill

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JPS61218135A (ja) * 1985-03-23 1986-09-27 Oki Electric Ind Co Ltd シリコン酸化膜の形成方法
US5069747A (en) * 1990-12-21 1991-12-03 Micron Technology, Inc. Creation and removal of temporary silicon dioxide structures on an in-process integrated circuit with minimal effect on exposed, permanent silicon dioxide structures
JPH06349817A (ja) * 1993-06-14 1994-12-22 Kawasaki Steel Corp 半導体装置の製造方法
JP2962250B2 (ja) * 1996-11-12 1999-10-12 日本電気株式会社 半導体記憶装置の製造方法
KR100363839B1 (ko) 1999-12-24 2002-12-06 주식회사 하이닉스반도체 반도체 소자의 층간 절연막 형성 방법
JP2002151664A (ja) * 2000-11-13 2002-05-24 Hitachi Ltd 半導体集積回路装置の製造方法
US7141483B2 (en) * 2002-09-19 2006-11-28 Applied Materials, Inc. Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill
JP2006041107A (ja) * 2004-07-26 2006-02-09 Seiko Epson Corp 半導体装置及びその製造方法
TWI311796B (en) * 2005-11-17 2009-07-01 Ememory Technology Inc Semiconductor device and manufacturing method thereof
JP4487266B2 (ja) * 2006-08-30 2010-06-23 エルピーダメモリ株式会社 半導体装置
JP2010182751A (ja) * 2009-02-03 2010-08-19 Renesas Electronics Corp 不揮発性半導体記憶装置及びその製造方法
JP6026914B2 (ja) * 2013-02-12 2016-11-16 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP6297430B2 (ja) * 2014-06-30 2018-03-20 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

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