JP6477975B2 - 半導体装置、その製造方法および半導体モジュール - Google Patents
半導体装置、その製造方法および半導体モジュール Download PDFInfo
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- JP6477975B2 JP6477975B2 JP2018527826A JP2018527826A JP6477975B2 JP 6477975 B2 JP6477975 B2 JP 6477975B2 JP 2018527826 A JP2018527826 A JP 2018527826A JP 2018527826 A JP2018527826 A JP 2018527826A JP 6477975 B2 JP6477975 B2 JP 6477975B2
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Description
図1は、この発明の実施の形態1における半導体装置を示す平面構造模式図である。図2は、この発明の実施の形態1における半導体装置の断面構造模式図である。図3は、この発明の実施の形態1における他の半導体装置の断面構造模式図である。図1中の一点鎖線AAにおける断面構造模式図が図2である。図において、半導体装置100は、半導体素子1、表面電極2、裏面電極3、金属部材である厚膜電極4、樹脂部材5を備える。また、同様に半導体装置200は、半導体素子1、表面電極2、裏面電極3、金属部材である厚膜電極4、樹脂部材5を備える。
本実施の形態2においては、実施の形態1で用いた樹脂部材5の配置において、樹脂部材5は厚膜電極4の裏面よりも下部へ突出した形状である点が異なる。このように、樹脂部材5が厚膜電極4の裏面よりも下部へ突出させたので、厚膜電極4の裏面と他部材とのはんだ接合時の高さ調整のために、別部材を用いる必要がなく、樹脂部材5の厚膜電極4の裏面からの突出量に応じて、はんだ高さを調整することができる。なお、その他の点については、実施の形態1と同様であるので、詳しい説明は省略する。
本実施の形態3においては、実施の形態1で用いた厚膜電極4と樹脂部材5の配置において、厚膜電極4を半導体素子1よりも大きくしたことが異なる。また、樹脂部材5が厚膜電極4だけに接するように配置したことが異なる。なお、その他の点については、実施の形態1と同様であるので、詳しい説明は省略する。
本実施の形態4においては、実施の形態3で用いた樹脂部材5の配置において、樹脂部材5の高さを表面電極2のおもて面と同一平面となる高さとしたことが異なる。なお、その他の点については、効果を含めて実施の形態3と同様であるので、詳しい説明は省略する。
本実施の形態5においては、実施の形態1で用いた樹脂部材5の配置において、樹脂部材5の高さを表面電極2のおもて面に形成した厚膜電極8のおもて面と同一平面となる高さとしたことが異なる。また、裏面電極3の裏面に形成した厚膜電極4の大きさが異なる。なお、その他の点については、効果を含めて実施の形態1と同様であるので、詳しい説明は省略する。
本実施の形態6においては、実施の形態1で用いた表面電極2のおもて面上にのみ厚膜電極8を形成し、樹脂部材5の配置において、樹脂部材5の高さを厚膜電極8のおもて面の高さよりも高くしたとことが異なる。なお、その他の点については、効果を含めて実施の形態1と同様であるので、詳しい説明は省略する。
Claims (11)
- おもて面側に表面電極を有し、裏面側に裏面電極を有する薄厚の半導体素子と、
前記半導体素子の厚み以上の厚みであり、前記裏面電極の裏面に形成された金属部材と、
前記半導体素子の前記おもて面の前記表面電極の形成領域以外の全てと前記表面電極のおもて面とを露出し、前記半導体素子と前記裏面電極と前記金属部材のそれぞれの側面に直接接して前記半導体素子と前記裏面電極と前記金属部材との周囲を囲み、前記半導体素子の前記側面から前記半導体素子よりも外側へ突出する樹脂部材と、
を備えた半導体装置。 - おもて面側に複数に分割された表面電極を有し、裏面側に裏面電極を有する薄厚の半導体素子と、
前記半導体素子の厚み以上の厚みであり、前記表面電極のおもて面に形成された金属部材と、
前記複数に分割された前記表面電極の側面同士が対向する間の領域の前記半導体素子の前記おもて面と前記裏面電極の裏面とを露出し、前記金属部材と前記半導体素子と前記裏面電極のそれぞれの側面に直接接して前記半導体素子と前記裏面電極と前記金属部材との周囲を囲み、前記半導体素子の前記側面から前記半導体素子よりも外側へ突出する樹脂部材と、
を備えた半導体装置。 - おもて面側に表面電極を有し、裏面側に裏面電極を有する薄厚の半導体素子と、
前記半導体素子の厚み以上の厚みであり、前記裏面電極の裏面に形成され、前記半導体素子の外形よりも大きく、外周部で前記半導体素子の前記裏面との間に隙間を有する金属部材と、
前記金属部材の側面と裏面とに接し、前記金属部材の前記側面から前記金属部材よりも外側へ突出し、前記金属部材の周囲を囲む樹脂部材と、
を備えた半導体装置。 - 前記樹脂部材は、前記半導体素子の前記おもて面側へ突出し、前記半導体素子の側面との間に隙間を有して前記半導体素子の周囲を囲む請求項3に記載の半導体装置。
- 前記金属部材は、前記裏面電極の前記裏面に前記金属部材のおもて面が接して形成され、前記裏面電極よりも大きい請求項3または請求項4に記載の半導体装置。
- 前記金属部材は、前記裏面電極よりも小さく、前記裏面電極の前記裏面に前記金属部材のおもて面が接して形成され、
前記樹脂部材は、前記裏面電極の前記裏面と接している請求項1に記載の半導体装置。 - 前記半導体素子の厚みは、30μm以上150μm以下である請求項1から請求項6のいずれか1項に記載の半導体装置。
- 前記金属部材の厚みは、前記金属部材の曲げ剛性が、前記金属部材が形成される前記半導体素子の曲げ剛性以上となる厚みである請求項1から請求項7のいずれか1項に記載の半導体装置。
- 薄厚の半導体ウエハのおもて面に表面電極、裏面に裏面電極を形成する電極形成工程と、
前記裏面電極の裏面に金属部材を形成する金属部材形成工程と、
前記半導体ウエハを半導体素子に個片化する半導体素子個片化工程と、
前記半導体素子の前記おもて面の前記表面電極の形成領域以外の全てと前記表面電極のおもて面とを露出し、前記半導体素子と前記裏面電極と前記金属部材のそれぞれの側面に直接接して前記半導体素子と前記裏面電極と前記金属部材との周囲を囲み、前記半導体素子の前記側面から前記半導体素子よりも外側へ突出する樹脂部材を設ける樹脂部材塗布工程と、
を備えた半導体装置の製造方法。 - 前記表面電極の前記おもて面を保護シート上に配置する半導体素子配置工程と、
前記保護シートから前記半導体素子を取り外す半導体素子取外し工程と、
を備えた請求項9に記載の半導体装置の製造方法。 - 請求項1から請求項8のいずれか1項に記載の半導体装置を有し、前記半導体装置が搭載された絶縁基板と、
前記半導体装置と前記絶縁基板とを封止する封止部材と、
前記絶縁基板と接合された冷却器と、
を備えた半導体モジュール。
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Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54126577U (ja) * | 1978-02-24 | 1979-09-04 | ||
JPS54177272U (ja) * | 1978-05-31 | 1979-12-14 | ||
JPS56124265A (en) * | 1980-03-05 | 1981-09-29 | Hitachi Ltd | Semiconductor device |
JPH09298211A (ja) * | 1996-05-08 | 1997-11-18 | Mitsubishi Electric Corp | 圧接型半導体装置およびその製造方法 |
JP2000058717A (ja) * | 1998-08-17 | 2000-02-25 | Hitachi Ltd | 平型半導体装置、及びこれを用いた変換器 |
JP2001350266A (ja) * | 2000-06-09 | 2001-12-21 | Sumitomo Chem Co Ltd | レジスト組成物の製造方法 |
JP2005064475A (ja) * | 2003-07-25 | 2005-03-10 | Sharp Corp | 窒化物系化合物半導体発光素子およびその製造方法 |
JP2011061116A (ja) * | 2009-09-14 | 2011-03-24 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US20130207243A1 (en) * | 2012-02-15 | 2013-08-15 | Infineon Technologies Ag | Method of Manufacturing a Semiconductor Device |
JP2015220382A (ja) * | 2014-05-20 | 2015-12-07 | 三菱電機株式会社 | パワーモジュール |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU8403075A (en) | 1974-08-27 | 1977-02-24 | Auto-Bake Pty Limited | A food processing oven |
JPS54126577A (en) | 1978-03-24 | 1979-10-01 | Nec Corp | Breakdown voltage measuring apparatus of electronic parts |
US4388635A (en) | 1979-07-02 | 1983-06-14 | Hitachi, Ltd. | High breakdown voltage semiconductor device |
WO2000008683A1 (en) | 1998-08-07 | 2000-02-17 | Hitachi, Ltd. | Flat semiconductor device, method for manufacturing the same, and converter comprising the same |
US6809348B1 (en) | 1999-10-08 | 2004-10-26 | Denso Corporation | Semiconductor device and method for manufacturing the same |
JP3695314B2 (ja) * | 2000-04-06 | 2005-09-14 | 株式会社デンソー | 絶縁ゲート型パワーic |
DE102004012818B3 (de) | 2004-03-16 | 2005-10-27 | Infineon Technologies Ag | Verfahren zum Herstellen eines Leistungshalbleiterbauelements |
US7880278B2 (en) * | 2006-05-16 | 2011-02-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit having stress tuning layer |
JP2009200338A (ja) * | 2008-02-22 | 2009-09-03 | Renesas Technology Corp | 半導体装置の製造方法 |
JP5365627B2 (ja) | 2008-04-09 | 2013-12-11 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
US8124449B2 (en) * | 2008-12-02 | 2012-02-28 | Infineon Technologies Ag | Device including a semiconductor chip and metal foils |
JP5126278B2 (ja) | 2010-02-04 | 2013-01-23 | 株式会社デンソー | 半導体装置およびその製造方法 |
US8513771B2 (en) | 2010-06-07 | 2013-08-20 | Infineon Technologies Ag | Semiconductor package with integrated inductor |
JP2013021254A (ja) * | 2011-07-14 | 2013-01-31 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
JP2013183104A (ja) * | 2012-03-02 | 2013-09-12 | Toyota Industries Corp | 半導体装置 |
JP5558595B2 (ja) | 2012-03-14 | 2014-07-23 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
US8604610B1 (en) * | 2012-06-13 | 2013-12-10 | Fairchild Semiconductor Corporation | Flexible power module semiconductor packages |
JP6699111B2 (ja) | 2015-08-18 | 2020-05-27 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
-
2018
- 2018-01-15 JP JP2018527826A patent/JP6477975B2/ja active Active
- 2018-01-15 CN CN201880015536.7A patent/CN110383439B/zh active Active
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Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54126577U (ja) * | 1978-02-24 | 1979-09-04 | ||
JPS54177272U (ja) * | 1978-05-31 | 1979-12-14 | ||
JPS56124265A (en) * | 1980-03-05 | 1981-09-29 | Hitachi Ltd | Semiconductor device |
JPH09298211A (ja) * | 1996-05-08 | 1997-11-18 | Mitsubishi Electric Corp | 圧接型半導体装置およびその製造方法 |
JP2000058717A (ja) * | 1998-08-17 | 2000-02-25 | Hitachi Ltd | 平型半導体装置、及びこれを用いた変換器 |
JP2001350266A (ja) * | 2000-06-09 | 2001-12-21 | Sumitomo Chem Co Ltd | レジスト組成物の製造方法 |
JP2005064475A (ja) * | 2003-07-25 | 2005-03-10 | Sharp Corp | 窒化物系化合物半導体発光素子およびその製造方法 |
JP2011061116A (ja) * | 2009-09-14 | 2011-03-24 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US20130207243A1 (en) * | 2012-02-15 | 2013-08-15 | Infineon Technologies Ag | Method of Manufacturing a Semiconductor Device |
JP2015220382A (ja) * | 2014-05-20 | 2015-12-07 | 三菱電機株式会社 | パワーモジュール |
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