JP6464435B2 - 受動素子用のスーパーポーザ基板を備えるダイパッケージ - Google Patents
受動素子用のスーパーポーザ基板を備えるダイパッケージ Download PDFInfo
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Description
Claims (14)
- 半導体ダイ用のパッケージであって、
自身の前面の近くで能動回路を有し、前記前面の反対側に裏面を有し、前記裏面には複数の半田バンプがある第1の半導体ダイと、
前記第1の半導体ダイの前記裏面にある複数の半田バンプと電気的に連結され、前記第1の半導体ダイの前記裏面の近くに存在するコンポーネント基板と、
前記コンポーネント基板上に存在する電気的な複数の受動素子と、
前記第1の半導体ダイの前記裏面を貫通するシリコン貫通ビアに連結される前記半田バンプによって、前記受動素子を前記第1の半導体ダイの前記能動回路に接続する導電性パスと、
前記第1の半導体ダイの反対側における前記コンポーネント基板の側面上で、前記コンポーネント基板に接続される第2の半導体ダイと、
前記第1の半導体ダイの前記前面上に存在するビルドアップ層基板と、
前記コンポーネント基板と前記ビルドアップ層基板との間に存在するモールドコンパウンドと、
前記モールドコンパウンドを貫通して前記受動素子を前記ビルドアップ層基板に接続する、鉛直な側壁を有するモールド貫通ビアであって、前記第1の半導体ダイを貫通して進むことなく前記コンポーネント基板に電力を伝送するモールド貫通ビアと、
を備え、
前記コンポーネント基板は、前記第2の半導体ダイから前記第1の半導体ダイの前記裏面への電気的接続を介在する、
パッケージ。 - 前記コンポーネント基板は、前記第1の半導体ダイの前記裏面に接続される、
請求項1に記載のパッケージ。 - 前記ビルドアップ層基板は、前記第1の半導体ダイの前記前面に接続されるパッケージ基板である、
請求項1または2に記載のパッケージ。 - 前記コンポーネント基板は、ガラス、セラミックまたはシリコンの少なくとも1つから形成される、
請求項1から3のいずれか一項に記載のパッケージ。 - 前記コンポーネント基板はシリコン基板を有し、前記複数の受動素子は前記シリコン基板と統合される、
請求項1から3のいずれか一項に記載のパッケージ。 - 前記能動回路は無線周波数回路を有し、
前記複数の受動素子の少なくとも一部は、前記無線周波数回路と連結される、
請求項1から5のいずれか一項に記載のパッケージ。 - 前記複数の受動素子は、複数のインダクタ、複数の変圧器、複数のキャパシタ、及び複数の抵抗器の少なくとも1つを有する、
請求項1から6のいずれか一項に記載のパッケージ。 - 前記複数のキャパシタは複数の金属−絶縁体−金属キャパシタを有し、前記コンポーネント基板は絶縁体として機能する、
請求項7に記載のパッケージ。 - 前記複数のインダクタは、前記コンポーネント基板内に形成される複数の鉛直インダクタを含む、
請求項8に記載のパッケージ。 - 前記第1の半導体ダイは前記モールドコンパウンドに埋め込まれる、
請求項1に記載のパッケージ。 - 前記コンポーネント基板は、前記第1の半導体ダイの上方を横方向に延伸し、前記パッケージは、前記第1の半導体ダイを貫通して進むことなく電力を前記コンポーネント基板から前記第2の半導体ダイに伝送するビアを更に備える、
請求項1に記載のパッケージ。 - コンポーネント基板上に複数の受動素子を形成する段階と、
第1のダイの前面の複数の回路まで前記第1のダイの裏面を貫通する複数のビアを形成する段階と、
前記第1のダイの前記前面をパッケージ基板に取り付ける段階と、
前記複数の受動素子が前記複数のビアに連結される複数の半田バンプによって前記複数の回路に接続されるように前記コンポーネント基板を前記第1のダイの前記裏面に取り付ける段階と、
前記第1のダイの反対側における前記コンポーネント基板上に第2のダイを取り付け、その結果、前記コンポーネント基板の第2の受動素子が前記第2のダイの複数の回路に接続され、前記第2のダイが前記コンポーネント基板によって前記第1のダイに電気的に接続される段階と、
前記第1のダイをモールドコンパウンドに埋め込む段階であって、前記モールドコンパウンドは前記コンポーネント基板と前記パッケージ基板との間に存在し、前記第1のダイを貫通して進むことなく前記コンポーネント基板に電力を伝送するためのモールド貫通ビアであって、鉛直な側壁を有するモールド貫通ビアが前記モールドコンパウンドを貫通して形成されて、前記受動素子を前記パッケージ基板に接続する、段階と、
を含み、
前記コンポーネント基板は前記第1のダイと前記第2のダイとの間の接続を介在する、方法。 - 前記コンポーネント基板を取り付ける段階の前に、前記第1のダイの前記前面上に前記パッケージ基板を形成する段階と
を更に含む、請求項12に記載の方法。 - 前記コンポーネント基板を取り付ける段階の前に前記第1のダイの前記前面をパッケージ基板に取り付ける段階、及び、前記コンポーネント基板を取り付ける段階の後に前記第1のダイ及び前記第2のダイの上方で前記パッケージ基板にカバーを取り付ける段階を更に含む、
請求項12または13に記載の方法。
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PCT/US2013/062388 WO2015047330A1 (en) | 2013-09-27 | 2013-09-27 | Die package with superposer substrate for passive components |
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JP (1) | JP6464435B2 (ja) |
KR (2) | KR102052294B1 (ja) |
CN (1) | CN104517953B (ja) |
DE (1) | DE202014104574U1 (ja) |
GB (1) | GB2520149B (ja) |
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Families Citing this family (54)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3140838B1 (en) | 2014-05-05 | 2021-08-25 | 3D Glass Solutions, Inc. | Inductive device in a photo-definable glass structure |
US9613942B2 (en) * | 2015-06-08 | 2017-04-04 | Qualcomm Incorporated | Interposer for a package-on-package structure |
KR102423254B1 (ko) * | 2015-06-22 | 2022-07-20 | 인텔 코포레이션 | 커패시터를 포함하는 집적 회로 |
US10269767B2 (en) | 2015-07-31 | 2019-04-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-chip packages with multi-fan-out scheme and methods of manufacturing the same |
CN107924899B (zh) * | 2015-08-27 | 2023-05-02 | 英特尔公司 | 多管芯封装 |
US9935076B1 (en) * | 2015-09-30 | 2018-04-03 | Apple Inc. | Structure and method for fabricating a computing system with an integrated voltage regulator module |
US9870929B2 (en) * | 2015-10-14 | 2018-01-16 | Taiwan Semiconductor Manufacturing Company Ltd. | Package structure, fan-out package structure and method of the same |
WO2017111790A1 (en) | 2015-12-23 | 2017-06-29 | Manusharow Mathew J | Improving size and efficiency of dies |
WO2017147511A1 (en) | 2016-02-25 | 2017-08-31 | 3D Glass Solutions, Inc. | 3d capacitor and capacitor array fabricating photoactive substrates |
WO2017177171A1 (en) | 2016-04-08 | 2017-10-12 | 3D Glass Solutions, Inc. | Methods of fabricating photosensitive substrates suitable for optical coupler |
US10002844B1 (en) | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
TWI708361B (zh) * | 2017-03-15 | 2020-10-21 | 聯華電子股份有限公司 | 半導體封裝結構及其形成方法 |
KR102420212B1 (ko) | 2017-04-28 | 2022-07-13 | 3디 글래스 솔루션즈 인코포레이티드 | Rf 서큘레이터 |
US20190006331A1 (en) * | 2017-06-30 | 2019-01-03 | Intel Corporation | Electronics package devices with through-substrate-vias having pitches independent of substrate thickness |
US11342896B2 (en) | 2017-07-07 | 2022-05-24 | 3D Glass Solutions, Inc. | 2D and 3D RF lumped element devices for RF system in a package photoactive glass substrates |
US10447274B2 (en) * | 2017-07-11 | 2019-10-15 | iCometrue Company Ltd. | Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells |
TWI632644B (zh) * | 2017-08-30 | 2018-08-11 | 絡達科技股份有限公司 | 積體電路結構 |
US11646288B2 (en) * | 2017-09-29 | 2023-05-09 | Intel Corporation | Integrating and accessing passive components in wafer-level packages |
EP3724946B1 (en) | 2017-12-15 | 2024-04-17 | 3D Glass Solutions, Inc. | Coupled transmission line resonate rf filter |
US10957626B2 (en) | 2017-12-19 | 2021-03-23 | Thermo Electron Scientific Instruments Llc | Sensor device with carbon nanotube sensor positioned on first and second substrates |
US11380597B2 (en) | 2017-12-22 | 2022-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures |
US10923408B2 (en) * | 2017-12-22 | 2021-02-16 | Invensas Bonding Technologies, Inc. | Cavity packages |
AU2018399638B2 (en) | 2018-01-04 | 2021-09-02 | 3D Glass Solutions, Inc. | Impedance matching conductive structure for high efficiency RF circuits |
TWI704848B (zh) * | 2018-03-09 | 2020-09-11 | 鈺橋半導體股份有限公司 | 具有嵌埋式元件及加強層之線路板、其製法及其面朝面半導體組體 |
US11315891B2 (en) | 2018-03-23 | 2022-04-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of forming semiconductor packages having a die with an encapsulant |
US11735570B2 (en) * | 2018-04-04 | 2023-08-22 | Intel Corporation | Fan out packaging pop mechanical attach method |
JP6888105B2 (ja) | 2018-04-10 | 2021-06-16 | スリーディー グラス ソリューションズ,インク3D Glass Solutions,Inc | Rf集積電力調整コンデンサ |
US11004757B2 (en) | 2018-05-14 | 2021-05-11 | Invensas Bonding Technologies, Inc. | Bonded structures |
KR102475010B1 (ko) | 2018-05-29 | 2022-12-07 | 3디 글래스 솔루션즈 인코포레이티드 | 저 삽입 손실 rf 전송 라인 |
US11894322B2 (en) | 2018-05-29 | 2024-02-06 | Analog Devices, Inc. | Launch structures for radio frequency integrated device packages |
US11424196B2 (en) | 2018-06-01 | 2022-08-23 | Analog Devices, Inc. | Matching circuit for integrated circuit die |
KR102322938B1 (ko) | 2018-09-17 | 2021-11-09 | 3디 글래스 솔루션즈 인코포레이티드 | 접지면을 갖는 고효율 컴팩트형 슬롯 안테나 |
US11417615B2 (en) | 2018-11-27 | 2022-08-16 | Analog Devices, Inc. | Transition circuitry for integrated circuit die |
US11721677B2 (en) * | 2018-12-27 | 2023-08-08 | Intel Corporation | Microelectronic assemblies having an integrated capacitor |
WO2020139951A1 (en) | 2018-12-28 | 2020-07-02 | 3D Glass Solutions, Inc. | Heterogenous integration for rf, microwave and mm wave systems in photoactive glass substrates |
KR102392858B1 (ko) | 2018-12-28 | 2022-05-03 | 3디 글래스 솔루션즈 인코포레이티드 | 환상형 커패시터 rf, 마이크로파, 및 mm 파 시스템들 |
KR20210147040A (ko) | 2019-04-05 | 2021-12-06 | 3디 글래스 솔루션즈 인코포레이티드 | 유리 기반의 빈 기판 집적 도파관 디바이스 |
CA3136642C (en) | 2019-04-18 | 2023-01-03 | 3D Glass Solutions, Inc. | High efficiency die dicing and release |
CN111952268A (zh) | 2019-05-15 | 2020-11-17 | 西部数据技术公司 | 多模块集成内插器和由此形成的半导体器件 |
US11350537B2 (en) | 2019-05-21 | 2022-05-31 | Analog Devices, Inc. | Electrical feedthrough assembly |
US11004783B2 (en) | 2019-05-29 | 2021-05-11 | Microsoft Technology Licensing, Llc | Integrated circuit chip design for symmetric power delivery |
US11264358B2 (en) | 2019-09-11 | 2022-03-01 | Google Llc | ASIC package with photonics and vertical power delivery |
US11101211B2 (en) | 2019-09-26 | 2021-08-24 | International Business Machines Corporation | Semiconductor device with backside inductor using through silicon vias |
US10978419B1 (en) * | 2019-10-14 | 2021-04-13 | Nanya Technology Corporation | Semiconductor package and manufacturing method thereof |
KR20210079005A (ko) | 2019-12-19 | 2021-06-29 | 삼성전자주식회사 | 반도체 패키지 및 그 제조방법 |
US11276668B2 (en) * | 2020-02-12 | 2022-03-15 | Google Llc | Backside integrated voltage regulator for integrated circuits |
EP4121988A4 (en) | 2020-04-17 | 2023-08-30 | 3D Glass Solutions, Inc. | BROADBAND INDUCTOR |
US11769768B2 (en) | 2020-06-01 | 2023-09-26 | Wolfspeed, Inc. | Methods for pillar connection on frontside and passive device integration on backside of die |
US11348884B1 (en) * | 2020-11-13 | 2022-05-31 | Taiwan Semiconductor Manufacturing Company Limited | Organic interposer including a dual-layer inductor structure and methods of forming the same |
CN115516587A (zh) * | 2021-04-23 | 2022-12-23 | 京东方科技集团股份有限公司 | 集成有无源器件的基板及其制备方法 |
CN115516588A (zh) * | 2021-04-23 | 2022-12-23 | 京东方科技集团股份有限公司 | 集成有无源器件的基板及其制备方法 |
US20230050400A1 (en) * | 2021-08-13 | 2023-02-16 | Mediatek Inc. | Semiconductor package with reduced connection length |
US20230082743A1 (en) * | 2021-09-13 | 2023-03-16 | RF360 Europe GmbH | Integrated passive devices |
US11744021B2 (en) | 2022-01-21 | 2023-08-29 | Analog Devices, Inc. | Electronic assembly |
Family Cites Families (48)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09219468A (ja) | 1996-12-09 | 1997-08-19 | Shinko Electric Ind Co Ltd | 電子部品用基体 |
US6218729B1 (en) | 1999-03-11 | 2001-04-17 | Atmel Corporation | Apparatus and method for an integrated circuit having high Q reactive components |
JP3792445B2 (ja) * | 1999-03-30 | 2006-07-05 | 日本特殊陶業株式会社 | コンデンサ付属配線基板 |
US6711029B2 (en) * | 2002-05-21 | 2004-03-23 | Cts Corporation | Low temperature co-fired ceramic with improved shrinkage control |
JP4057921B2 (ja) | 2003-01-07 | 2008-03-05 | 株式会社東芝 | 半導体装置およびそのアセンブリ方法 |
JP3917946B2 (ja) * | 2003-03-11 | 2007-05-23 | 富士通株式会社 | 積層型半導体装置 |
JP4509550B2 (ja) | 2003-03-19 | 2010-07-21 | 日本特殊陶業株式会社 | 中継基板、半導体素子付き中継基板、中継基板付き基板、半導体素子と中継基板と基板とからなる構造体 |
US20050094465A1 (en) | 2003-11-03 | 2005-05-05 | Netlist Inc. | Printed circuit board memory module with embedded passive components |
JP4204989B2 (ja) | 2004-01-30 | 2009-01-07 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
US7307331B2 (en) * | 2004-03-31 | 2007-12-11 | Intel Corporation | Integrated radio front-end module with embedded circuit elements |
US20060071650A1 (en) | 2004-09-30 | 2006-04-06 | Narendra Siva G | CPU power delivery system |
US20070013080A1 (en) | 2005-06-29 | 2007-01-18 | Intel Corporation | Voltage regulators and systems containing same |
KR100723032B1 (ko) * | 2005-10-19 | 2007-05-30 | 삼성전자주식회사 | 고효율 인덕터, 인덕터의 제조방법 및 인덕터를 이용한패키징 구조 |
US7390700B2 (en) | 2006-04-07 | 2008-06-24 | Texas Instruments Incorporated | Packaged system of semiconductor chips having a semiconductor interposer |
JP2008166373A (ja) | 2006-12-27 | 2008-07-17 | Nec Electronics Corp | 半導体装置およびその製造方法 |
US8310051B2 (en) * | 2008-05-27 | 2012-11-13 | Mediatek Inc. | Package-on-package with fan-out WLCSP |
US7969009B2 (en) | 2008-06-30 | 2011-06-28 | Qualcomm Incorporated | Through silicon via bridge interconnect |
KR100992344B1 (ko) | 2008-10-23 | 2010-11-04 | 삼성전기주식회사 | 반도체 멀티칩 패키지 |
US8344503B2 (en) | 2008-11-25 | 2013-01-01 | Freescale Semiconductor, Inc. | 3-D circuits with integrated passive devices |
JP5471605B2 (ja) | 2009-03-04 | 2014-04-16 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JP2010278334A (ja) | 2009-05-29 | 2010-12-09 | Elpida Memory Inc | 半導体装置 |
US20110050334A1 (en) | 2009-09-02 | 2011-03-03 | Qualcomm Incorporated | Integrated Voltage Regulator with Embedded Passive Device(s) |
US8362599B2 (en) * | 2009-09-24 | 2013-01-29 | Qualcomm Incorporated | Forming radio frequency integrated circuits |
KR101134635B1 (ko) | 2009-10-12 | 2012-04-09 | 금호석유화학 주식회사 | 액정 표시 소자용 실란트 조성물 |
KR101139699B1 (ko) | 2010-04-26 | 2012-05-02 | 한국과학기술원 | 수동소자가 적층된 반도체 칩, 이를 포함하는 3차원 멀티 칩 및 이를 포함하는 3차원 멀티 칩 패키지 |
US8558392B2 (en) * | 2010-05-14 | 2013-10-15 | Stats Chippac, Ltd. | Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant |
KR20110137059A (ko) | 2010-06-16 | 2011-12-22 | 주식회사 하이닉스반도체 | 적층 반도체 패키지 |
US9048112B2 (en) | 2010-06-29 | 2015-06-02 | Qualcomm Incorporated | Integrated voltage regulator with embedded passive device(s) for a stacked IC |
US9224647B2 (en) * | 2010-09-24 | 2015-12-29 | Stats Chippac, Ltd. | Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposer |
US8232173B2 (en) * | 2010-11-01 | 2012-07-31 | International Business Machines Corporation | Structure and design structure for high-Q value inductor and method of manufacturing the same |
KR101711045B1 (ko) | 2010-12-02 | 2017-03-02 | 삼성전자 주식회사 | 적층 패키지 구조물 |
US9177944B2 (en) | 2010-12-03 | 2015-11-03 | Xilinx, Inc. | Semiconductor device with stacked power converter |
US8773866B2 (en) * | 2010-12-10 | 2014-07-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Radio-frequency packaging with reduced RF loss |
KR101465968B1 (ko) | 2010-12-20 | 2014-11-28 | 인텔 코포레이션 | 칩 장치, 그 제조 방법 및 컴퓨터 시스템 |
JP2012204631A (ja) | 2011-03-25 | 2012-10-22 | Fujitsu Semiconductor Ltd | 半導体装置、半導体装置の製造方法及び電子装置 |
JP5536707B2 (ja) | 2011-04-04 | 2014-07-02 | 日本電信電話株式会社 | 半導体装置およびその製造方法 |
US8883561B2 (en) * | 2011-04-30 | 2014-11-11 | Stats Chippac, Ltd. | Semiconductor device and method of embedding TSV semiconductor die within encapsulant with TMV for vertical interconnect in POP |
US8816906B2 (en) | 2011-05-05 | 2014-08-26 | Intel Corporation | Chip packages including through-silicon via dice with vertically inegrated phased-array antennas and low-frequency and power delivery substrates |
US8901688B2 (en) * | 2011-05-05 | 2014-12-02 | Intel Corporation | High performance glass-based 60 ghz / mm-wave phased array antennas and methods of making same |
US8759950B2 (en) | 2011-05-05 | 2014-06-24 | Intel Corporation | Radio- and electromagnetic interference through-silicon vias for stacked-die packages, and methods of making same |
US8288209B1 (en) * | 2011-06-03 | 2012-10-16 | Stats Chippac, Ltd. | Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor die |
KR20130023104A (ko) | 2011-08-26 | 2013-03-07 | 한국전자통신연구원 | 밀리미터파용 레이더 패키지 |
JP5547703B2 (ja) | 2011-10-17 | 2014-07-16 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
KR101274460B1 (ko) | 2011-11-22 | 2013-06-18 | 삼성전기주식회사 | 반도체 패키지 및 그 제조 방법 |
US9162867B2 (en) | 2011-12-13 | 2015-10-20 | Intel Corporation | Through-silicon via resonators in chip packages and methods of assembling same |
US8716859B2 (en) | 2012-01-10 | 2014-05-06 | Intel Mobile Communications GmbH | Enhanced flip chip package |
US9548251B2 (en) | 2012-01-12 | 2017-01-17 | Broadcom Corporation | Semiconductor interposer having a cavity for intra-interposer die |
US20150262902A1 (en) * | 2014-03-12 | 2015-09-17 | Invensas Corporation | Integrated circuits protected by substrates with cavities, and methods of manufacture |
-
2013
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- 2013-09-27 KR KR1020187031416A patent/KR102052294B1/ko active IP Right Grant
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US20160181211A1 (en) | 2016-06-23 |
CN104517953B (zh) | 2018-12-18 |
KR20180120814A (ko) | 2018-11-06 |
EP3050098A4 (en) | 2017-05-10 |
TWI671866B (zh) | 2019-09-11 |
GB2520149B (en) | 2018-05-16 |
GB2520149A (en) | 2015-05-13 |
KR102052294B1 (ko) | 2019-12-04 |
GB201416330D0 (en) | 2014-10-29 |
DE202014104574U1 (de) | 2014-11-13 |
JP2016528735A (ja) | 2016-09-15 |
EP3050098B1 (en) | 2021-05-19 |
KR20160036666A (ko) | 2016-04-04 |
US10615133B2 (en) | 2020-04-07 |
CN104517953A (zh) | 2015-04-15 |
TWI575675B (zh) | 2017-03-21 |
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