CN115516587A - 集成有无源器件的基板及其制备方法 - Google Patents

集成有无源器件的基板及其制备方法 Download PDF

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Publication number
CN115516587A
CN115516587A CN202180000864.1A CN202180000864A CN115516587A CN 115516587 A CN115516587 A CN 115516587A CN 202180000864 A CN202180000864 A CN 202180000864A CN 115516587 A CN115516587 A CN 115516587A
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China
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layer
forming
dielectric layer
substructure
transparent
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CN202180000864.1A
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Inventor
车春城
刘锋
肖月磊
李月
杜国琛
曹雪
吴艺凡
常文博
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BOE Technology Group Co Ltd
Beijing BOE Sensor Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Sensor Technology Co Ltd
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Publication of CN115516587A publication Critical patent/CN115516587A/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F17/0013—Printed inductances with stacked layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • H01F41/041—Printed circuit coils
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10—Inductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

本公开提供一种集成有无源器件的基板及其制备方法，属于射频器件技术领域。本公开的集成有无源器件的基板的制备方法，其包括：提供一透明介质层，所述第一透明介质层具有第一连接过孔；所述透明介质层包括沿厚度方向相对设置的第一表面和第二表面；在所述透明介质层上集成无源器件；所述无源器件至少包括电感；其中，在所述透明介质层上集成所述无源器件包括：在所述透明介质层的第一表面形成第一子结构，在所述第二表面形成第二子结构，并在所述第一连接过孔内形成第一连接电极；所述第一子结构、所述第一连接电极和所述第二子结构连接形成电感的线圈结构。

Description

PCT国内申请，说明书已公开。

Claims (15)

  1. PCT国内申请，权利要求书已公开。
CN202180000864.1A 2021-04-23 2021-04-23 集成有无源器件的基板及其制备方法 Pending CN115516587A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2021/089225 WO2022222131A1 (zh) 2021-04-23 2021-04-23 集成有无源器件的基板及其制备方法

Publications (1)

Publication Number Publication Date
CN115516587A true CN115516587A (zh) 2022-12-23

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CN202180000864.1A Pending CN115516587A (zh) 2021-04-23 2021-04-23 集成有无源器件的基板及其制备方法

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US (1) US20240145321A1 (zh)
CN (1) CN115516587A (zh)
WO (1) WO2022222131A1 (zh)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102136430B (zh) * 2010-01-27 2013-03-27 日月光半导体制造股份有限公司 半导体封装结构及其制造方法
US20140104284A1 (en) * 2012-10-16 2014-04-17 Qualcomm Mems Technologies, Inc. Through substrate via inductors
KR20160036666A (ko) * 2013-09-27 2016-04-04 인텔 코포레이션 수동 부품용 중첩체 기판을 구비한 다이 패키지
CN111834341B (zh) * 2020-06-17 2021-09-21 珠海越亚半导体股份有限公司 电容电感嵌埋结构及其制作方法和基板
CN111769808A (zh) * 2020-06-18 2020-10-13 复旦大学 一种基于三维电容电感的低通滤波器及制备方法

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WO2022222131A1 (zh) 2022-10-27

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