JP6169249B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- JP6169249B2 JP6169249B2 JP2016505129A JP2016505129A JP6169249B2 JP 6169249 B2 JP6169249 B2 JP 6169249B2 JP 2016505129 A JP2016505129 A JP 2016505129A JP 2016505129 A JP2016505129 A JP 2016505129A JP 6169249 B2 JP6169249 B2 JP 6169249B2
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Description
(装置構成)
図1は、本発明に係る実施の形態1のSiC−RC−IGBT100の構成を示す断面図である。なお、図1は、SiC−RC−IGBT100の一部の断面であり、実際の半導体チップにおいては、同じ構成が活性領域に繰り返して複数配列されているが、便宜的に図1の構成をもってSiC−RC−IGBT100と呼称する。
以下、製造工程を順に示す断面図である図3〜図9を用いて、SiC−RC−IGBT100の製造方法について説明する。
(装置構成)
図10は、本発明に係る実施の形態2のSiC−RC−IGBT200の構成を示す断面図である。なお、図1は、SiC−RC−IGBT200の一部の断面であり、実際の半導体チップにおいては、同じ構成が活性領域に繰り返して複数配列されているが、便宜的に図10の構成をもってSiC−RC−IGBT200と呼称する。
以下、製造工程を順に示す断面図である図11〜図21を用いて、SiC−RC−IGBT200の製造方法について説明する。
(装置構成)
図22は、本発明に係る実施の形態3のSiC−RC−IGBT300の構成を示す断面図である。なお、図22は、SiC−RC−IGBT300の一部の断面であり、実際の半導体チップにおいては、同じ構成が活性領域に繰り返して複数配列されているが、便宜的に図22の構成をもってSiC−RC−IGBT300と呼称する。
以下、SiC−RC−IGBT300の製造方法について説明する。上述したように図22に示すSiC−RC−IGBT300は、図1に示すSiC−RC−IGBT100に対して、不純物領域13をさらに有している点で異なっている。
(装置構成)
図23は、本発明に係る実施の形態4のSiC−RC−IGBT400の構成を示す断面図である。なお、図23は、SiC−RC−IGBT400の一部の断面であり、実際の半導体チップにおいては、同じ構成が活性領域に繰り返して複数配列されているが、便宜的に図23の構成をもってSiC−RC−IGBT400と呼称する。
以下、SiC−RC−IGBT400の製造方法について説明する。上述したように図23に示すSiC−RC−IGBT400は、図1に示すSiC−RC−IGBT100に対して、キャリアトラップ領域14をさらに有している点で異なっている。
以上説明した実施の形態1〜4では、ドリフト領域4で構成されるSiC基板を用いてRC−IGBTを製造する方法について説明したが、支持基板上にドリフト領域4が形成された基板を用いてRC−IGBTを製造しても良い。
Claims (14)
- 第2導電型の炭化珪素半導体領域に形成された絶縁ゲート型バイポーラトランジスタと、前記絶縁ゲート型バイポーラトランジスタに逆並列に接続されたダイオードを有する半導体装置であって、
前記絶縁ゲート型バイポーラトランジスタは、
前記炭化珪素半導体領域の一方の主面上に配設されたエミッタ電極と、
前記炭化珪素半導体領域の前記一方の主面側の上層部に選択的に複数配設された第1導電型のベース領域と、
前記ベース領域のそれぞれの上層部に選択的に配設され、前記エミッタ電極と電気的に接続された第2導電型のエミッタ領域と、
前記炭化珪素半導体領域の他方の主面側の上層部に配設された第1導電型のコレクタ領域と、
前記炭化珪素半導体領域の前記他方の主面上に配設され、前記コレクタ領域と電気的に接続されたコレクタ電極と、
前記炭化珪素半導体領域、前記エミッタ領域および前記ベース領域に連続して接するように配設されたゲート絶縁膜と、
前記ゲート絶縁膜を介して前記炭化珪素半導体領域、前記エミッタ領域および前記ベース領域に対向するように配置されたゲート電極と、を備え、
前記ダイオードは、
前記エミッタ領域に隣接して設けられ、前記エミッタ電極と電気的に接続された第1導電型のベースコンタクト領域と、
前記炭化珪素半導体領域の前記他方の主面側の上層部に配設され、前記コレクタ領域に隣接して設けられ、前記コレクタ電極に電気的に接続された第2導電型のカソード領域と、を備え、
前記絶縁ゲート型バイポーラトランジスタは、
前記コレクタ領域の上方の前記炭化珪素半導体領域内の主電流の通電領域に配設された、キャリアトラップが前記カソード領域の上方の前記炭化珪素半導体領域内よりも低減されたキャリアトラップ低減領域を、さらに備える、半導体装置。 - 前記キャリアトラップ低減領域は、炭素、珪素、水素およびヘリウムの少なくとも一つをイオン注入して形成される、請求項1記載の半導体装置。
- 前記キャリアトラップ低減領域は、
隣り合う前記ベース領域の間から前記コレクタ領域の上方にかけての前記炭化珪素半導体領域内に設けられる、請求項1または請求項2記載の半導体装置。 - 前記ゲート絶縁膜は、
隣り合う前記ベース領域の間の前記炭化珪素半導体領域の前記一方の主面から前記炭化珪素半導体領域内に達するように設けられたトレンチの内面を覆うように設けられ、
前記ゲート電極は、
内面が前記ゲート絶縁膜で覆われた前記トレンチ内を埋め込むように設けられ、
前記キャリアトラップ低減領域は、
前記トレンチの下方から前記コレクタ領域の上方にかけての前記炭化珪素半導体領域内に設けられる、請求項1または請求項2記載の半導体装置。 - 前記炭化珪素半導体領域の前記一方の主面側の上層部に前記一方の主面全面に渡るように設けられた、第2導電型の不純物を前記炭化珪素半導体領域より高濃度に含む不純物領域をさらに備え、
前記不純物領域は、前記ベース領域および前記エミッタ領域を包含する深さを有し、
前記キャリアトラップ低減領域は、
隣り合う前記ベース領域の間の前記不純物領域の下方から前記コレクタ領域の上方にかけての前記炭化珪素半導体領域内に設けられる、請求項1または請求項2記載の半導体装置。 - 前記半導体装置は、
前記カソード領域と、その上方の前記ベース領域との間の前記炭化珪素半導体領域に設けられたキャリアトラップ領域をさらに備え、
前記キャリアトラップ領域は、前記キャリアトラップ領域が設けられていない前記炭化珪素半導体領域よりも多くのキャリアトラップを含む、請求項1または請求項2記載の半導体装置。 - 前記キャリアトラップ低減領域は、
前記キャリアトラップの密度が1×109cm−3〜1×1013cm−3の範囲内にあり、
前記キャリアトラップ低減領域以外の前記炭化珪素半導体領域は、
前記キャリアトラップの密度が1×1011cm−3〜1×1015cm−3の範囲内にある、請求項1または請求項2記載の半導体装置。 - 前記キャリアトラップ低減領域は、
キャリア寿命が1マイクロ秒〜1ミリ秒の範囲内にあり、
前記キャリアトラップ低減領域以外の前記炭化珪素半導体領域は、
キャリア寿命が1ナノ秒〜1マイクロ秒の範囲内にある、請求項1または請求項2記載の半導体装置。 - 前記キャリアトラップ低減領域は、炭素、珪素、水素およびヘリウムのいずれかの原子の注入面密度が、1×1013cm−2〜1×1016cm−2の範囲内にある、請求項2記載の半導体装置。
- 第2導電型の炭化珪素半導体領域の一方の主面側の上層部に選択的に複数の第1導電型のベース領域を選択的に形成する工程と、
前記ベース領域のそれぞれの上層部に第2導電型のエミッタ領域を選択的に形成する工程と、
前記エミッタ領域に隣接して第1導電型のベースコンタクト領域を形成する工程と、
前記炭化珪素半導体領域の他方の主面側の上層部に第1導電型のコレクタ領域を形成する工程と、
前記炭化珪素半導体領域の前記他方の主面側の上層部に前記コレクタ領域に隣接して第2導電型のカソード領域を形成する工程と、
前記コレクタ領域の上方の前記炭化珪素半導体領域内にキャリアトラップ低減領域を形成する工程と、
ドーパント原子を活性化し、格子間炭素原子を拡散させる加熱工程と、
前記エミッタ領域および前記ベース領域に連続して接するようにゲート絶縁膜を形成する工程と、
前記ゲート絶縁膜を介して前記炭化珪素半導体領域、前記エミッタ領域および前記ベース領域に対向するようにゲート電極を形成する工程と、
前記エミッタ領域および前記ベースコンタクト領域とオーミック接触するエミッタ電極を形成する工程と、
前記コレクタ領域および前記カソード領域上にコレクタ電極を形成する工程と、を備え、
絶縁ゲート型バイポーラトランジスタと、前記絶縁ゲート型バイポーラトランジスタに逆並列に接続されたダイオードを形成する半導体装置の製造方法であって、
前記キャリアトラップ低減領域を形成する工程は、
(a)前記炭化珪素半導体領域の、前記絶縁ゲート型バイポーラトランジスタの主電流の通電領域に、格子間炭素を誘起するイオンのイオン注入を行って余剰な格子間炭素原子が存在する余剰炭素原子含有領域を形成する工程と、
(b)前記工程(a)の後、前記格子間炭素原子を熱拡散させる工程を備える半導体装置の製造方法。 - 前記工程(a)は、
前記格子間炭素を誘起するイオンの注入面密度を、
前記炭化珪素半導体領域におけるキャリアトラップの密度を超えるように選択する工程を含む、請求項10記載の半導体装置の製造方法。 - 前記工程(b)は、
前記炭化珪素半導体領域の温度を1000℃〜2000℃の範囲内に設定して前記格子間炭素原子を熱拡散させる工程を含む、請求項10記載の半導体装置の製造方法。 - 第2導電型の炭化珪素半導体領域の一方の主面側の上層部に選択的に複数の第1導電型のベース領域を選択的に形成する工程と、
前記ベース領域のそれぞれの上層部に第2導電型のエミッタ領域を選択的に形成する工程と、
前記エミッタ領域に隣接して第1導電型のベースコンタクト領域を形成する工程と、
前記炭化珪素半導体領域の他方の主面側の上層部に第1導電型のコレクタ領域を形成する工程と、
前記炭化珪素半導体領域の前記他方の主面側の上層部に前記コレクタ領域に隣接して第2導電型のカソード領域を形成する工程と、
前記コレクタ領域の上方の前記炭化珪素半導体領域内にキャリアトラップ低減領域を形成する工程と、
ドーパント原子を活性化し、格子間炭素原子を拡散させる加熱工程と、
前記エミッタ領域および前記ベース領域に連続して接するようにゲート絶縁膜を形成する工程と、
前記ゲート絶縁膜を介して前記炭化珪素半導体領域、前記エミッタ領域および前記ベース領域に対向するようにゲート電極を形成する工程と、
前記エミッタ領域および前記ベースコンタクト領域とオーミック接触するエミッタ電極を形成する工程と、
前記コレクタ領域および前記カソード領域上にコレクタ電極を形成する工程と、を備え、
絶縁ゲート型バイポーラトランジスタと、前記絶縁ゲート型バイポーラトランジスタに逆並列に接続されたダイオードを形成する半導体装置の製造方法であって、
前記キャリアトラップ低減領域を形成する工程は、
前記絶縁ゲート型バイポーラトランジスタの主電流の通電領域に対応する前記炭化珪素半導体領域の主面上に選択的に熱酸化膜を形成することで、熱酸化の過程で生じる余剰な格子間炭素原子を前記炭化珪素半導体領域に拡散させて、
前記コレクタ領域の上方の前記炭化珪素半導体領域内の前記主電流の通電領域に、キャリアトラップが前記カソード領域の上方の前記炭化珪素半導体領域内よりも低減された領域を形成する工程を備える半導体装置の製造方法。 - 前記炭化珪素半導体領域の主面から選択的に電子線照射を行い、前記カソード領域と、その上方の前記ベース領域との間の前記炭化珪素半導体領域にキャリアトラップ領域を形成する工程をさらに備え、
前記キャリアトラップ領域は、前記キャリアトラップ領域が設けられていない前記炭化珪素半導体領域よりも多くのキャリアトラップを含む、請求項10または請求項13記載の半導体装置の製造方法。
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