JP5953703B2 - リードフレームおよび半導体装置 - Google Patents

リードフレームおよび半導体装置 Download PDF

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Publication number
JP5953703B2
JP5953703B2 JP2011239444A JP2011239444A JP5953703B2 JP 5953703 B2 JP5953703 B2 JP 5953703B2 JP 2011239444 A JP2011239444 A JP 2011239444A JP 2011239444 A JP2011239444 A JP 2011239444A JP 5953703 B2 JP5953703 B2 JP 5953703B2
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JP
Japan
Prior art keywords
lead
region
chip mounting
terminal
semiconductor device
Prior art date
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Expired - Fee Related
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JP2011239444A
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English (en)
Japanese (ja)
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JP2013098332A (ja
JP2013098332A5 (https=
Inventor
渡辺 信二
信二 渡辺
昭久 栄森
昭久 栄森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
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Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2011239444A priority Critical patent/JP5953703B2/ja
Priority to CN201210423881.9A priority patent/CN103094238B/zh
Priority to US13/659,557 priority patent/US8928136B2/en
Publication of JP2013098332A publication Critical patent/JP2013098332A/ja
Publication of JP2013098332A5 publication Critical patent/JP2013098332A5/ja
Application granted granted Critical
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Expired - Fee Related legal-status Critical Current
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • H10W70/424Cross-sectional shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • H10W70/424Cross-sectional shapes
    • H10W70/427Bent parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/014Manufacture or treatment using batch processing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07302Connecting or disconnecting of die-attach connectors using an auxiliary member
    • H10W72/07304Connecting or disconnecting of die-attach connectors using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07502Connecting or disconnecting of bond wires using an auxiliary member
    • H10W72/07504Connecting or disconnecting of bond wires using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/127Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
JP2011239444A 2011-10-31 2011-10-31 リードフレームおよび半導体装置 Expired - Fee Related JP5953703B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2011239444A JP5953703B2 (ja) 2011-10-31 2011-10-31 リードフレームおよび半導体装置
CN201210423881.9A CN103094238B (zh) 2011-10-31 2012-10-24 引线框架和半导体器件
US13/659,557 US8928136B2 (en) 2011-10-31 2012-10-24 Lead frame semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011239444A JP5953703B2 (ja) 2011-10-31 2011-10-31 リードフレームおよび半導体装置

Publications (3)

Publication Number Publication Date
JP2013098332A JP2013098332A (ja) 2013-05-20
JP2013098332A5 JP2013098332A5 (https=) 2014-11-27
JP5953703B2 true JP5953703B2 (ja) 2016-07-20

Family

ID=48171542

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011239444A Expired - Fee Related JP5953703B2 (ja) 2011-10-31 2011-10-31 リードフレームおよび半導体装置

Country Status (3)

Country Link
US (1) US8928136B2 (https=)
JP (1) JP5953703B2 (https=)
CN (1) CN103094238B (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6352009B2 (ja) * 2013-04-16 2018-07-04 ローム株式会社 半導体装置
CN103337488B (zh) * 2013-06-05 2016-09-14 吉林华微斯帕克电气有限公司 一种引线框架
JP6413709B2 (ja) * 2014-12-02 2018-10-31 富士電機株式会社 半導体装置およびその製造方法
US9966326B2 (en) * 2015-03-16 2018-05-08 Unisem (M) Berhad Lead frames with wettable flanks
JP6507779B2 (ja) * 2015-03-26 2019-05-08 セイコーエプソン株式会社 電気光学装置、電気光学装置の製造方法、および電子機器
JP6555927B2 (ja) * 2015-05-18 2019-08-07 大口マテリアル株式会社 半導体素子搭載用リードフレーム及び半導体装置の製造方法
JP6923299B2 (ja) * 2016-09-26 2021-08-18 株式会社アムコー・テクノロジー・ジャパン 半導体装置及び半導体装置の製造方法
JP6772087B2 (ja) * 2017-02-17 2020-10-21 新光電気工業株式会社 リードフレーム及びその製造方法
US10679929B2 (en) * 2017-07-28 2020-06-09 Advanced Semiconductor Engineering Korea, Inc. Semiconductor package device and method of manufacturing the same
US20190221502A1 (en) * 2018-01-17 2019-07-18 Microchip Technology Incorporated Down Bond in Semiconductor Devices
CN110828442A (zh) * 2019-11-04 2020-02-21 弘凯光电(深圳)有限公司 封装结构及其制作方法
CN115706068A (zh) * 2021-08-13 2023-02-17 江苏长电科技股份有限公司 Qfn封装结构及其制造方法
CN115706071A (zh) * 2021-08-13 2023-02-17 江苏长电科技股份有限公司 Qfn封装结构及其制造方法

Family Cites Families (28)

* Cited by examiner, † Cited by third party
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US5084753A (en) * 1989-01-23 1992-01-28 Analog Devices, Inc. Packaging for multiple chips on a single leadframe
JPH0621319A (ja) * 1992-06-30 1994-01-28 Nec Corp 半導体装置用リードフレーム
JP2811170B2 (ja) * 1996-06-28 1998-10-15 株式会社後藤製作所 樹脂封止型半導体装置及びその製造方法
DE19808193B4 (de) * 1998-02-27 2007-11-08 Robert Bosch Gmbh Leadframevorrichtung und entsprechendes Herstellungsverfahren
JPH11340405A (ja) * 1998-05-22 1999-12-10 Fujitsu Quantum Devices Kk リードフレーム、半導体装置およびその製造方法
KR100526844B1 (ko) * 1999-10-15 2005-11-08 앰코 테크놀로지 코리아 주식회사 반도체패키지 및 그 제조방법
US6198171B1 (en) * 1999-12-30 2001-03-06 Siliconware Precision Industries Co., Ltd. Thermally enhanced quad flat non-lead package of semiconductor
TW447059B (en) * 2000-04-28 2001-07-21 Siliconware Precision Industries Co Ltd Multi-chip module integrated circuit package
JP2001313363A (ja) * 2000-05-01 2001-11-09 Rohm Co Ltd 樹脂封止型半導体装置
JP2002026190A (ja) * 2000-07-03 2002-01-25 Dainippon Printing Co Ltd 樹脂封止型半導体装置
US6661082B1 (en) * 2000-07-19 2003-12-09 Fairchild Semiconductor Corporation Flip chip substrate design
JP3895570B2 (ja) * 2000-12-28 2007-03-22 株式会社ルネサステクノロジ 半導体装置
US6720207B2 (en) * 2001-02-14 2004-04-13 Matsushita Electric Industrial Co., Ltd. Leadframe, resin-molded semiconductor device including the leadframe, method of making the leadframe and method for manufacturing the device
JP2003204027A (ja) * 2002-01-09 2003-07-18 Matsushita Electric Ind Co Ltd リードフレーム及びその製造方法、樹脂封止型半導体装置及びその製造方法
KR100993277B1 (ko) 2002-04-30 2010-11-10 르네사스 일렉트로닉스 가부시키가이샤 반도체장치 및 전자 장치
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JP2005191342A (ja) * 2003-12-26 2005-07-14 Renesas Technology Corp 半導体装置およびその製造方法
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JP4652281B2 (ja) 2006-05-29 2011-03-16 パナソニック株式会社 樹脂封止型半導体装置
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WO2008057770A2 (en) * 2006-10-27 2008-05-15 Unisem (Mauritius) Holdings Limited Partially patterned lead frames and methods of making and using the same in semiconductor packaging
CN101308832B (zh) * 2007-05-17 2010-06-16 南茂科技股份有限公司 用于无引线封装的引线框、其封装结构及其制造方法
JP5184558B2 (ja) * 2010-01-18 2013-04-17 ルネサスエレクトロニクス株式会社 半導体装置

Also Published As

Publication number Publication date
JP2013098332A (ja) 2013-05-20
CN103094238B (zh) 2017-07-14
CN103094238A (zh) 2013-05-08
US20130105957A1 (en) 2013-05-02
US8928136B2 (en) 2015-01-06

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