JP5953703B2 - リードフレームおよび半導体装置 - Google Patents
リードフレームおよび半導体装置 Download PDFInfo
- Publication number
- JP5953703B2 JP5953703B2 JP2011239444A JP2011239444A JP5953703B2 JP 5953703 B2 JP5953703 B2 JP 5953703B2 JP 2011239444 A JP2011239444 A JP 2011239444A JP 2011239444 A JP2011239444 A JP 2011239444A JP 5953703 B2 JP5953703 B2 JP 5953703B2
- Authority
- JP
- Japan
- Prior art keywords
- lead
- region
- chip mounting
- terminal
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
- H10W70/424—Cross-sectional shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
- H10W70/424—Cross-sectional shapes
- H10W70/427—Bent parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/014—Manufacture or treatment using batch processing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07302—Connecting or disconnecting of die-attach connectors using an auxiliary member
- H10W72/07304—Connecting or disconnecting of die-attach connectors using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07502—Connecting or disconnecting of bond wires using an auxiliary member
- H10W72/07504—Connecting or disconnecting of bond wires using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/127—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011239444A JP5953703B2 (ja) | 2011-10-31 | 2011-10-31 | リードフレームおよび半導体装置 |
| CN201210423881.9A CN103094238B (zh) | 2011-10-31 | 2012-10-24 | 引线框架和半导体器件 |
| US13/659,557 US8928136B2 (en) | 2011-10-31 | 2012-10-24 | Lead frame semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011239444A JP5953703B2 (ja) | 2011-10-31 | 2011-10-31 | リードフレームおよび半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013098332A JP2013098332A (ja) | 2013-05-20 |
| JP2013098332A5 JP2013098332A5 (https=) | 2014-11-27 |
| JP5953703B2 true JP5953703B2 (ja) | 2016-07-20 |
Family
ID=48171542
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011239444A Expired - Fee Related JP5953703B2 (ja) | 2011-10-31 | 2011-10-31 | リードフレームおよび半導体装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8928136B2 (https=) |
| JP (1) | JP5953703B2 (https=) |
| CN (1) | CN103094238B (https=) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6352009B2 (ja) * | 2013-04-16 | 2018-07-04 | ローム株式会社 | 半導体装置 |
| CN103337488B (zh) * | 2013-06-05 | 2016-09-14 | 吉林华微斯帕克电气有限公司 | 一种引线框架 |
| JP6413709B2 (ja) * | 2014-12-02 | 2018-10-31 | 富士電機株式会社 | 半導体装置およびその製造方法 |
| US9966326B2 (en) * | 2015-03-16 | 2018-05-08 | Unisem (M) Berhad | Lead frames with wettable flanks |
| JP6507779B2 (ja) * | 2015-03-26 | 2019-05-08 | セイコーエプソン株式会社 | 電気光学装置、電気光学装置の製造方法、および電子機器 |
| JP6555927B2 (ja) * | 2015-05-18 | 2019-08-07 | 大口マテリアル株式会社 | 半導体素子搭載用リードフレーム及び半導体装置の製造方法 |
| JP6923299B2 (ja) * | 2016-09-26 | 2021-08-18 | 株式会社アムコー・テクノロジー・ジャパン | 半導体装置及び半導体装置の製造方法 |
| JP6772087B2 (ja) * | 2017-02-17 | 2020-10-21 | 新光電気工業株式会社 | リードフレーム及びその製造方法 |
| US10679929B2 (en) * | 2017-07-28 | 2020-06-09 | Advanced Semiconductor Engineering Korea, Inc. | Semiconductor package device and method of manufacturing the same |
| US20190221502A1 (en) * | 2018-01-17 | 2019-07-18 | Microchip Technology Incorporated | Down Bond in Semiconductor Devices |
| CN110828442A (zh) * | 2019-11-04 | 2020-02-21 | 弘凯光电(深圳)有限公司 | 封装结构及其制作方法 |
| CN115706068A (zh) * | 2021-08-13 | 2023-02-17 | 江苏长电科技股份有限公司 | Qfn封装结构及其制造方法 |
| CN115706071A (zh) * | 2021-08-13 | 2023-02-17 | 江苏长电科技股份有限公司 | Qfn封装结构及其制造方法 |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5084753A (en) * | 1989-01-23 | 1992-01-28 | Analog Devices, Inc. | Packaging for multiple chips on a single leadframe |
| JPH0621319A (ja) * | 1992-06-30 | 1994-01-28 | Nec Corp | 半導体装置用リードフレーム |
| JP2811170B2 (ja) * | 1996-06-28 | 1998-10-15 | 株式会社後藤製作所 | 樹脂封止型半導体装置及びその製造方法 |
| DE19808193B4 (de) * | 1998-02-27 | 2007-11-08 | Robert Bosch Gmbh | Leadframevorrichtung und entsprechendes Herstellungsverfahren |
| JPH11340405A (ja) * | 1998-05-22 | 1999-12-10 | Fujitsu Quantum Devices Kk | リードフレーム、半導体装置およびその製造方法 |
| KR100526844B1 (ko) * | 1999-10-15 | 2005-11-08 | 앰코 테크놀로지 코리아 주식회사 | 반도체패키지 및 그 제조방법 |
| US6198171B1 (en) * | 1999-12-30 | 2001-03-06 | Siliconware Precision Industries Co., Ltd. | Thermally enhanced quad flat non-lead package of semiconductor |
| TW447059B (en) * | 2000-04-28 | 2001-07-21 | Siliconware Precision Industries Co Ltd | Multi-chip module integrated circuit package |
| JP2001313363A (ja) * | 2000-05-01 | 2001-11-09 | Rohm Co Ltd | 樹脂封止型半導体装置 |
| JP2002026190A (ja) * | 2000-07-03 | 2002-01-25 | Dainippon Printing Co Ltd | 樹脂封止型半導体装置 |
| US6661082B1 (en) * | 2000-07-19 | 2003-12-09 | Fairchild Semiconductor Corporation | Flip chip substrate design |
| JP3895570B2 (ja) * | 2000-12-28 | 2007-03-22 | 株式会社ルネサステクノロジ | 半導体装置 |
| US6720207B2 (en) * | 2001-02-14 | 2004-04-13 | Matsushita Electric Industrial Co., Ltd. | Leadframe, resin-molded semiconductor device including the leadframe, method of making the leadframe and method for manufacturing the device |
| JP2003204027A (ja) * | 2002-01-09 | 2003-07-18 | Matsushita Electric Ind Co Ltd | リードフレーム及びその製造方法、樹脂封止型半導体装置及びその製造方法 |
| KR100993277B1 (ko) | 2002-04-30 | 2010-11-10 | 르네사스 일렉트로닉스 가부시키가이샤 | 반도체장치 및 전자 장치 |
| KR100975692B1 (ko) * | 2002-07-01 | 2010-08-12 | 가부시끼가이샤 르네사스 테크놀로지 | 반도체 장치 |
| JP2004071801A (ja) * | 2002-08-06 | 2004-03-04 | Shinko Electric Ind Co Ltd | リードフレーム及びその製造方法 |
| US20040124508A1 (en) * | 2002-11-27 | 2004-07-01 | United Test And Assembly Test Center Ltd. | High performance chip scale leadframe package and method of manufacturing the package |
| JP2005057067A (ja) * | 2003-08-05 | 2005-03-03 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| JP2005191342A (ja) * | 2003-12-26 | 2005-07-14 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7247937B2 (en) * | 2005-01-06 | 2007-07-24 | Via Technologies, Inc. | Mounting pad structure for wire-bonding type lead frame packages |
| JP2007012857A (ja) * | 2005-06-30 | 2007-01-18 | Renesas Technology Corp | 半導体装置 |
| US7301225B2 (en) * | 2006-02-28 | 2007-11-27 | Freescale Semiconductor, Inc. | Multi-row lead frame |
| JP4652281B2 (ja) | 2006-05-29 | 2011-03-16 | パナソニック株式会社 | 樹脂封止型半導体装置 |
| US7556987B2 (en) * | 2006-06-30 | 2009-07-07 | Stats Chippac Ltd. | Method of fabricating an integrated circuit with etched ring and die paddle |
| WO2008057770A2 (en) * | 2006-10-27 | 2008-05-15 | Unisem (Mauritius) Holdings Limited | Partially patterned lead frames and methods of making and using the same in semiconductor packaging |
| CN101308832B (zh) * | 2007-05-17 | 2010-06-16 | 南茂科技股份有限公司 | 用于无引线封装的引线框、其封装结构及其制造方法 |
| JP5184558B2 (ja) * | 2010-01-18 | 2013-04-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2011
- 2011-10-31 JP JP2011239444A patent/JP5953703B2/ja not_active Expired - Fee Related
-
2012
- 2012-10-24 CN CN201210423881.9A patent/CN103094238B/zh not_active Expired - Fee Related
- 2012-10-24 US US13/659,557 patent/US8928136B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2013098332A (ja) | 2013-05-20 |
| CN103094238B (zh) | 2017-07-14 |
| CN103094238A (zh) | 2013-05-08 |
| US20130105957A1 (en) | 2013-05-02 |
| US8928136B2 (en) | 2015-01-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5953703B2 (ja) | リードフレームおよび半導体装置 | |
| US6627977B1 (en) | Semiconductor package including isolated ring structure | |
| TW575955B (en) | Leadframe and method of manufacturing a semiconductor device using the same | |
| US7808084B1 (en) | Semiconductor package with half-etched locking features | |
| JP5802695B2 (ja) | 半導体装置、半導体装置の製造方法 | |
| US9275945B2 (en) | Method of manufacturing semiconductor device and semiconductor device | |
| WO2004004005A1 (ja) | 半導体装置およびその製造方法 | |
| US20050051877A1 (en) | Semiconductor package having high quantity of I/O connections and method for fabricating the same | |
| KR20040026130A (ko) | 리드 프레임 및 그 제조 방법 | |
| US6163069A (en) | Semiconductor device having pads for connecting a semiconducting element to a mother board | |
| JP2005026466A (ja) | 半導体装置およびリードフレーム | |
| JP3470111B2 (ja) | 樹脂封止型半導体装置の製造方法 | |
| JP2005085089A (ja) | Icカードおよびその製造方法 | |
| US7531895B2 (en) | Integrated circuit package and method of manufacture thereof | |
| US20080073763A1 (en) | Semiconductor device and method of manufacturing the same | |
| JP2016201447A (ja) | モールドパッケージ | |
| US6787389B1 (en) | Semiconductor device having pads for connecting a semiconducting element to a mother board | |
| JP3877732B2 (ja) | リードフレームおよびそれを用いた半導体装置およびその半導体装置の製造方法 | |
| JP2015060876A (ja) | 半導体装置の製造方法 | |
| JP4305326B2 (ja) | 半導体パッケージの製造方法 | |
| JP2533011B2 (ja) | 表面実装型半導体装置 | |
| JP6494723B2 (ja) | 半導体パッケージ | |
| CN113937074A (zh) | 四方扁平无引线封装结构 | |
| US20250218907A1 (en) | Leadframe with retaining features | |
| JP4522802B2 (ja) | Icモジュール |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20141015 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20141015 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20150817 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150908 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151007 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160301 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160419 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160517 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160530 |
|
| R151 | Written notification of patent or utility model registration |
Ref document number: 5953703 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |