JP5752041B2 - 高応力下にあるチャネルを有するmosデバイスを製造するための方法 - Google Patents
高応力下にあるチャネルを有するmosデバイスを製造するための方法 Download PDFInfo
- Publication number
- JP5752041B2 JP5752041B2 JP2011529324A JP2011529324A JP5752041B2 JP 5752041 B2 JP5752041 B2 JP 5752041B2 JP 2011529324 A JP2011529324 A JP 2011529324A JP 2011529324 A JP2011529324 A JP 2011529324A JP 5752041 B2 JP5752041 B2 JP 5752041B2
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- Prior art keywords
- silicon
- stress
- layer
- gate electrode
- containing substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/796—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions having memorised stress for introducing strain in the channel regions, e.g. recrystallised polysilicon gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/240,682 | 2008-09-29 | ||
| US12/240,682 US7767534B2 (en) | 2008-09-29 | 2008-09-29 | Methods for fabricating MOS devices having highly stressed channels |
| PCT/US2009/058629 WO2010037036A1 (en) | 2008-09-29 | 2009-09-28 | Methods for fabricating mos devices having highly stressed channels |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012504345A JP2012504345A (ja) | 2012-02-16 |
| JP2012504345A5 JP2012504345A5 (enExample) | 2012-11-15 |
| JP5752041B2 true JP5752041B2 (ja) | 2015-07-22 |
Family
ID=41600727
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011529324A Active JP5752041B2 (ja) | 2008-09-29 | 2009-09-28 | 高応力下にあるチャネルを有するmosデバイスを製造するための方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US7767534B2 (enExample) |
| EP (1) | EP2335277B1 (enExample) |
| JP (1) | JP5752041B2 (enExample) |
| KR (1) | KR101561209B1 (enExample) |
| CN (1) | CN102165571B (enExample) |
| WO (1) | WO2010037036A1 (enExample) |
Families Citing this family (39)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5668277B2 (ja) * | 2009-06-12 | 2015-02-12 | ソニー株式会社 | 半導体装置 |
| US8236709B2 (en) | 2009-07-29 | 2012-08-07 | International Business Machines Corporation | Method of fabricating a device using low temperature anneal processes, a device and design structure |
| US8207043B2 (en) * | 2009-09-28 | 2012-06-26 | United Microelectronics Corp. | Method for fabricating a semiconductor device |
| US20110101506A1 (en) * | 2009-10-29 | 2011-05-05 | International Business Machines Corporation | Stress Memorization Technique Using Silicon Spacer |
| DE102010029532B4 (de) * | 2010-05-31 | 2012-01-26 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Transistor mit eingebettetem verformungsinduzierenden Material, das in diamantförmigen Aussparungen auf der Grundlage einer Voramorphisierung hergestellt ist |
| US8816409B2 (en) * | 2010-07-15 | 2014-08-26 | United Microelectronics Corp. | Metal-oxide semiconductor transistor |
| US8278196B2 (en) * | 2010-07-21 | 2012-10-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | High surface dopant concentration semiconductor device and method of fabricating |
| US8551845B2 (en) * | 2010-09-21 | 2013-10-08 | International Business Machines Corporation | Structure and method for increasing strain in a device |
| US9202913B2 (en) * | 2010-09-30 | 2015-12-01 | Institute of Microelectronics, Chinese Academy of Sciences | Method for manufacturing semiconductor structure |
| US8535999B2 (en) * | 2010-10-12 | 2013-09-17 | International Business Machines Corporation | Stress memorization process improvement for improved technology performance |
| US20120196422A1 (en) * | 2011-01-27 | 2012-08-02 | Globalfoundries Inc. | Stress Memorization Technique Using Gate Encapsulation |
| CN102637642B (zh) * | 2011-02-12 | 2013-11-06 | 中芯国际集成电路制造(上海)有限公司 | Cmos器件的制作方法 |
| CN102790013B (zh) * | 2011-05-16 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | Cmos晶体管的制作方法 |
| US8598005B2 (en) * | 2011-07-18 | 2013-12-03 | Spansion Llc | Method and manufacture for embedded flash to achieve high quality spacers for core and high voltage devices and low temperature spacers for high performance logic devices |
| CN103021849B (zh) * | 2011-09-20 | 2015-09-09 | 中芯国际集成电路制造(上海)有限公司 | 一种采用应力记忆技术的nmos器件制作方法 |
| US8815712B2 (en) * | 2011-12-28 | 2014-08-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for epitaxial re-growth of semiconductor region |
| US8753969B2 (en) * | 2012-01-27 | 2014-06-17 | GlobalFoundries, Inc. | Methods for fabricating MOS devices with stress memorization |
| US8841190B2 (en) | 2012-03-30 | 2014-09-23 | The Institute of Microelectronics Chinese Academy of Science | MOS device for making the source/drain region closer to the channel region and method of manufacturing the same |
| CN103367151B (zh) * | 2012-03-30 | 2015-12-16 | 中国科学院微电子研究所 | 使源/漏区更接近沟道区的mos器件及其制作方法 |
| US8574978B1 (en) * | 2012-04-11 | 2013-11-05 | United Microelectronics Corp. | Method for forming semiconductor device |
| TWI566299B (zh) * | 2012-04-11 | 2017-01-11 | 聯華電子股份有限公司 | 半導體元件之製作方法 |
| US8835243B2 (en) | 2012-05-04 | 2014-09-16 | United Microelectronics Corp. | Semiconductor process |
| US8877599B2 (en) * | 2012-05-15 | 2014-11-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a semiconductor device |
| US8772120B2 (en) * | 2012-05-24 | 2014-07-08 | United Microelectronics Corp. | Semiconductor process |
| US8962433B2 (en) * | 2012-06-12 | 2015-02-24 | United Microelectronics Corp. | MOS transistor process |
| US8716146B2 (en) * | 2012-07-03 | 2014-05-06 | Intermolecular, Inc | Low temperature etching of silicon nitride structures using phosphoric acid solutions |
| KR101986538B1 (ko) | 2012-09-21 | 2019-06-07 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| US9117925B2 (en) * | 2013-01-31 | 2015-08-25 | United Microelectronics Corp. | Epitaxial process |
| US10438856B2 (en) * | 2013-04-03 | 2019-10-08 | Stmicroelectronics, Inc. | Methods and devices for enhancing mobility of charge carriers |
| US9947772B2 (en) | 2014-03-31 | 2018-04-17 | Stmicroelectronics, Inc. | SOI FinFET transistor with strained channel |
| US9472642B2 (en) * | 2014-12-09 | 2016-10-18 | Globalfoundries Inc. | Method of forming a semiconductor device structure and such a semiconductor device structure |
| CN105990093B (zh) * | 2015-02-03 | 2019-01-18 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法、电子装置 |
| CN104701234A (zh) * | 2015-03-16 | 2015-06-10 | 上海华力微电子有限公司 | 一种半导体器件的制作方法 |
| CN106158654B (zh) * | 2015-04-20 | 2019-04-26 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构的形成方法 |
| KR102414957B1 (ko) | 2018-06-15 | 2022-06-29 | 삼성전자주식회사 | 반도체 장치의 제조 방법 |
| US10529818B1 (en) * | 2018-07-26 | 2020-01-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device with reduced flicker noise |
| JP7150524B2 (ja) * | 2018-08-24 | 2022-10-11 | キオクシア株式会社 | 半導体装置 |
| CN110648907A (zh) * | 2019-09-29 | 2020-01-03 | 武汉新芯集成电路制造有限公司 | 一种栅极及其制作方法 |
| CN113506720B (zh) * | 2021-06-21 | 2024-04-26 | 上海华力集成电路制造有限公司 | 一种晶圆背面平整度改善的方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004172389A (ja) * | 2002-11-20 | 2004-06-17 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7052946B2 (en) * | 2004-03-10 | 2006-05-30 | Taiwan Semiconductor Manufacturing Co. Ltd. | Method for selectively stressing MOSFETs to improve charge carrier mobility |
| US7002209B2 (en) * | 2004-05-21 | 2006-02-21 | International Business Machines Corporation | MOSFET structure with high mechanical stress in the channel |
| US20060099765A1 (en) * | 2004-11-11 | 2006-05-11 | International Business Machines Corporation | Method to enhance cmos transistor performance by inducing strain in the gate and channel |
| US7226820B2 (en) * | 2005-04-07 | 2007-06-05 | Freescale Semiconductor, Inc. | Transistor fabrication using double etch/refill process |
| US7462524B1 (en) * | 2005-08-16 | 2008-12-09 | Advanced Micro Devices, Inc. | Methods for fabricating a stressed MOS device |
| US7785950B2 (en) * | 2005-11-10 | 2010-08-31 | International Business Machines Corporation | Dual stress memory technique method and related structure |
| DE102006035666B3 (de) * | 2006-07-31 | 2008-04-17 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Ausbilden einer Halbleiterstruktur |
| US20080124858A1 (en) * | 2006-08-07 | 2008-05-29 | Bich-Yen Nguyen | Selective stress relaxation by amorphizing implant in strained silicon on insulator integrated circuit |
| JP5181459B2 (ja) * | 2006-10-27 | 2013-04-10 | ソニー株式会社 | 半導体装置およびその製造方法 |
| US7897493B2 (en) * | 2006-12-08 | 2011-03-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Inducement of strain in a semiconductor layer |
| US7888194B2 (en) * | 2007-03-05 | 2011-02-15 | United Microelectronics Corp. | Method of fabricating semiconductor device |
| US7759207B2 (en) * | 2007-03-21 | 2010-07-20 | Chartered Semiconductor Manufacturing Ltd. | Integrated circuit system employing stress memorization transfer |
| KR20090012573A (ko) * | 2007-07-30 | 2009-02-04 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
| JP5223285B2 (ja) * | 2007-10-09 | 2013-06-26 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| US20090289284A1 (en) * | 2008-05-23 | 2009-11-26 | Chartered Semiconductor Manufacturing, Ltd. | High shrinkage stress silicon nitride (SiN) layer for NFET improvement |
-
2008
- 2008-09-29 US US12/240,682 patent/US7767534B2/en active Active
-
2009
- 2009-09-28 JP JP2011529324A patent/JP5752041B2/ja active Active
- 2009-09-28 WO PCT/US2009/058629 patent/WO2010037036A1/en not_active Ceased
- 2009-09-28 EP EP09793070.5A patent/EP2335277B1/en active Active
- 2009-09-28 KR KR1020117009989A patent/KR101561209B1/ko active Active
- 2009-09-28 CN CN200980139354.1A patent/CN102165571B/zh active Active
-
2010
- 2010-04-30 US US12/771,948 patent/US8076209B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20100081245A1 (en) | 2010-04-01 |
| KR101561209B1 (ko) | 2015-10-16 |
| KR20110081254A (ko) | 2011-07-13 |
| US20100210084A1 (en) | 2010-08-19 |
| EP2335277A1 (en) | 2011-06-22 |
| US8076209B2 (en) | 2011-12-13 |
| EP2335277B1 (en) | 2015-07-22 |
| WO2010037036A1 (en) | 2010-04-01 |
| JP2012504345A (ja) | 2012-02-16 |
| CN102165571A (zh) | 2011-08-24 |
| CN102165571B (zh) | 2013-07-31 |
| US7767534B2 (en) | 2010-08-03 |
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