JP5708798B2 - セラミック電子部品の製造方法 - Google Patents
セラミック電子部品の製造方法 Download PDFInfo
- Publication number
- JP5708798B2 JP5708798B2 JP2013515068A JP2013515068A JP5708798B2 JP 5708798 B2 JP5708798 B2 JP 5708798B2 JP 2013515068 A JP2013515068 A JP 2013515068A JP 2013515068 A JP2013515068 A JP 2013515068A JP 5708798 B2 JP5708798 B2 JP 5708798B2
- Authority
- JP
- Japan
- Prior art keywords
- external terminal
- terminal electrode
- forming
- ceramic
- ceramic green
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0091—Apparatus for coating printed circuits using liquid non-metallic coating compositions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0545—Pattern for applying drops or paste; Applying a pattern made of drops or paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1216—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by screen printing or stencil printing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
- H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
- Y10T428/24488—Differential nonuniformity at margin
Description
2 セラミック層
3 部品本体
4 内部導体膜
5 ビア導体
6 主面
7,7a,7b 外部端子電極
8 周縁部
9 中央部
10 外部端子電極の表面
11 被覆層
12 被覆層の端部
13 めっき膜
21 セラミックグリーンシート
22,25,28,35,38,41 スクリーン版
Claims (12)
- セラミックグリーンシートを用意する工程と、
前記セラミックグリーンシートの主面に導電性ペーストを用いて外部端子電極を形成する工程と、
前記外部端子電極が形成された前記セラミックグリーンシートを焼成する工程と、
を備え、
前記外部端子電極を形成する工程は、その周縁部が、その中央部とは反対側にある外周を規定する端部に近づくほど薄くされながら、その周縁部の厚みが、最も厚い部分で前記周縁部によって囲まれた中央部の厚みよりも厚くなるように、前記外部端子電極を形成する工程を含み、
前記外部端子電極を形成する工程は、前記周縁部と前記中央部とをそれぞれ別に形成する工程を含み、前記周縁部を形成する工程の後に、前記中央部を形成する工程が実施される、
セラミック電子部品の製造方法。 - 前記周縁部を形成する工程で用いられる導電性ペーストと前記中央部を形成する工程で用いられる導電性ペーストとは、互いに異なる組成を有する、請求項1に記載のセラミック電子部品の製造方法。
- 前記周縁部を形成する工程で用いられる導電性ペーストは、前記中央部を形成する工程で用いられる導電性ペーストに比べて、無機材料の含有量がより多くされる、請求項2に記載のセラミック電子部品の製造方法。
- 前記周縁部を形成する工程で用いられる導電性ペーストは、前記中央部を形成する工程で用いられる導電性ペーストに比べて、有機溶剤の量がより少なくされる、請求項2または3に記載のセラミック電子部品の製造方法。
- 前記焼成する工程の前に、前記外部端子電極が形成された前記セラミックグリーンシートをプレスする工程をさらに備える、請求項1ないし4のいずれかに記載のセラミック電子部品の製造方法。
- 前記プレスする工程は、前記外部端子電極の前記周縁部の少なくとも一部を前記セラミックグリーンシートに埋め込む工程を含む、請求項5に記載のセラミック電子部品の製造方法。
- 前記プレスする工程は、前記外部端子電極の表面が前記セラミックグリーンシートの主面と同一面上に位置するようにプレスする工程を含む、請求項6に記載のセラミック電子部品の製造方法。
- 前記焼成する工程の前に、前記外部端子電極の前記周縁部の少なくとも一部を覆うように前記セラミックグリーンシート上に電気絶縁性の被覆層を形成する工程をさらに備える、請求項1ないし4のいずれかに記載のセラミック電子部品の製造方法。
- 前記被覆層を形成する工程は、絶縁体ペーストをスクリーン印刷により塗布する工程を含む、請求項8に記載のセラミック電子部品の製造方法。
- 前記焼成する工程の前に、前記外部端子電極の表面と前記被覆層の表面とが同一面上に位置するように、前記外部端子電極および前記被覆層が形成された前記セラミックグリーンシートをプレスする工程をさらに備える、請求項8または9に記載のセラミック電子部品の製造方法。
- 前記外部端子電極の表面にめっき膜を形成する工程をさらに備える、請求項1ないし10のいずれかに記載のセラミック電子部品の製造方法。
- 前記セラミックグリーンシートを用意する工程において、複数のセラミックグリーンシートが用意され、前記複数のセラミックグリーンシートのうちの特定のものに対して前記外部端子電極を形成する工程が実施され、さらに、前記複数のセラミックグリーンシートのうちの特定のものに内部導体を形成する工程と、前記外部端子電極が一方の主面上に位置するように、前記複数のセラミックグリーンシートを積層する工程とを備える、請求項1ないし11のいずれかに記載のセラミック電子部品の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013515068A JP5708798B2 (ja) | 2011-05-16 | 2012-04-27 | セラミック電子部品の製造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011109121 | 2011-05-16 | ||
JP2011109121 | 2011-05-16 | ||
JP2013515068A JP5708798B2 (ja) | 2011-05-16 | 2012-04-27 | セラミック電子部品の製造方法 |
PCT/JP2012/061364 WO2012157436A1 (ja) | 2011-05-16 | 2012-04-27 | セラミック電子部品およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2012157436A1 JPWO2012157436A1 (ja) | 2014-07-31 |
JP5708798B2 true JP5708798B2 (ja) | 2015-04-30 |
Family
ID=47176771
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013515068A Active JP5708798B2 (ja) | 2011-05-16 | 2012-04-27 | セラミック電子部品の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10178774B2 (ja) |
JP (1) | JP5708798B2 (ja) |
CN (1) | CN103535121B (ja) |
WO (1) | WO2012157436A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6496026B2 (ja) * | 2015-07-28 | 2019-04-03 | 京セラ株式会社 | 配線基板および電子装置 |
JP6699723B2 (ja) * | 2016-05-09 | 2020-05-27 | 株式会社村田製作所 | セラミック電子部品 |
JP6767204B2 (ja) * | 2016-08-25 | 2020-10-14 | 京セラ株式会社 | 電子部品搭載用基板、電子装置および電子モジュール |
JP7131628B2 (ja) | 2018-11-08 | 2022-09-06 | 株式会社村田製作所 | セラミック電子部品 |
US11088090B1 (en) * | 2020-02-12 | 2021-08-10 | Qualcomm Incorporated | Package comprising a substrate that includes a stress buffer layer |
CN219181776U (zh) * | 2020-06-17 | 2023-06-13 | 株式会社村田制作所 | 电子部件 |
WO2021256561A1 (ja) * | 2020-06-18 | 2021-12-23 | 株式会社村田製作所 | 電子部品及び電子部品の製造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08125341A (ja) * | 1994-10-25 | 1996-05-17 | Hitachi Ltd | 電子回路装置 |
JP2004221407A (ja) * | 2003-01-16 | 2004-08-05 | Kyocera Corp | 配線基板 |
WO2008053956A1 (en) * | 2006-11-02 | 2008-05-08 | Murata Manufacturing Co., Ltd. | Ceramic substrate, electronic device and method for producing ceramic substrate |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2783751B2 (ja) * | 1993-12-21 | 1998-08-06 | 富士通株式会社 | 多層セラミック基板の製造方法 |
JPH0858259A (ja) | 1994-08-19 | 1996-03-05 | Taiyo Yuden Co Ltd | スクリーン印刷用版 |
JPH0864932A (ja) | 1994-08-25 | 1996-03-08 | Tokin Corp | メタライズ基板の製造方法 |
JP4370663B2 (ja) | 2000-03-22 | 2009-11-25 | 株式会社村田製作所 | 積層型セラミック電子部品およびその製造方法ならびに電子装置 |
JP3994936B2 (ja) | 2002-07-16 | 2007-10-24 | 株式会社村田製作所 | 積層型セラミック電子部品およびその製造方法 |
US6861588B2 (en) * | 2002-07-16 | 2005-03-01 | Murata Manufacturing Co., Ltd. | Laminated ceramic electronic component and method of producing the same |
JP2006335045A (ja) | 2005-06-06 | 2006-12-14 | Murata Mfg Co Ltd | スクリーン印刷版およびその製造方法、積層セラミック電子部品の製造方法 |
US7388296B2 (en) * | 2005-06-09 | 2008-06-17 | Ngk Spark Plug Co., Ltd. | Wiring substrate and bonding pad composition |
CN101933409B (zh) * | 2008-01-31 | 2013-03-27 | 株式会社村田制作所 | 陶瓷多层基板的制造方法及陶瓷多层基板 |
-
2012
- 2012-04-27 JP JP2013515068A patent/JP5708798B2/ja active Active
- 2012-04-27 WO PCT/JP2012/061364 patent/WO2012157436A1/ja active Application Filing
- 2012-04-27 CN CN201280023700.1A patent/CN103535121B/zh active Active
-
2013
- 2013-10-31 US US14/068,053 patent/US10178774B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08125341A (ja) * | 1994-10-25 | 1996-05-17 | Hitachi Ltd | 電子回路装置 |
JP2004221407A (ja) * | 2003-01-16 | 2004-08-05 | Kyocera Corp | 配線基板 |
WO2008053956A1 (en) * | 2006-11-02 | 2008-05-08 | Murata Manufacturing Co., Ltd. | Ceramic substrate, electronic device and method for producing ceramic substrate |
Also Published As
Publication number | Publication date |
---|---|
US10178774B2 (en) | 2019-01-08 |
US20140057080A1 (en) | 2014-02-27 |
JPWO2012157436A1 (ja) | 2014-07-31 |
CN103535121B (zh) | 2017-06-20 |
CN103535121A (zh) | 2014-01-22 |
WO2012157436A1 (ja) | 2012-11-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5708798B2 (ja) | セラミック電子部品の製造方法 | |
JP6297082B2 (ja) | セラミック基板およびその製造方法 | |
JP4404139B2 (ja) | 積層型基板、電子装置および積層型基板の製造方法 | |
KR100885136B1 (ko) | 세라믹 기판, 전자 장치 및 세라믹 기판의 제조 방법 | |
JP2016034035A (ja) | 基板内蔵用積層セラミック電子部品及びそれを備える印刷回路基板 | |
US9466425B2 (en) | Glass ceramic substrate and method for producing the same | |
JP5582069B2 (ja) | セラミック多層基板 | |
JP4711823B2 (ja) | 電子部品収納用パッケージおよび電子装置 | |
US11659659B2 (en) | Ceramic electronic component | |
JP2008112787A (ja) | 多層セラミックス基板及びその製造方法 | |
JP4900226B2 (ja) | 多層セラミック基板及びその製造方法、電子部品 | |
JP5981389B2 (ja) | 配線基板 | |
WO2009151006A1 (ja) | セラミック成形体の製造方法 | |
WO2023002894A1 (ja) | セラミック電子部品 | |
JP7212783B2 (ja) | 電子素子実装用基板、電子装置、電子モジュールおよび電子素子実装用基板の製造方法 | |
JP5383531B2 (ja) | 配線基板の製造方法 | |
JP2013115123A (ja) | 配線基板およびその製造方法 | |
JP2011176020A (ja) | 多数個取り配線基板およびその製造方法 | |
JP6818609B2 (ja) | 配線基体および撮像装置 | |
JP2008112786A (ja) | 多層セラミックス基板及びその製造方法 | |
JP6026898B2 (ja) | セラミック配線基板 | |
JP6017994B2 (ja) | 電子素子搭載用基板および電子装置 | |
WO2017217174A1 (ja) | セラミック電子部品 | |
JP2015201514A (ja) | 配線基板およびその製造方法 | |
JP5996293B2 (ja) | セラミック多層基板の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20140826 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20141118 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20141127 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150106 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150109 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150203 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150216 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5708798 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |