JP5700617B2 - Ｓｏｉ基板の作製方法 - Google Patents

Ｓｏｉ基板の作製方法 Download PDF

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Publication number
JP5700617B2
JP5700617B2 JP2009159047A JP2009159047A JP5700617B2 JP 5700617 B2 JP5700617 B2 JP 5700617B2 JP 2009159047 A JP2009159047 A JP 2009159047A JP 2009159047 A JP2009159047 A JP 2009159047A JP 5700617 B2 JP5700617 B2 JP 5700617B2
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Japan
Prior art keywords
layer
substrate
glass substrate
insulating layer
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009159047A
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English (en)
Japanese (ja)
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JP2010041044A5 (enExample
JP2010041044A (ja
Inventor
哲弥 掛端
哲弥 掛端
大沼　英人
英人 大沼
孔明 山本
孔明 山本
賢一郎 牧野
賢一郎 牧野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
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Filing date
Publication date
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Priority to JP2009159047A priority Critical patent/JP5700617B2/ja
Publication of JP2010041044A publication Critical patent/JP2010041044A/ja
Publication of JP2010041044A5 publication Critical patent/JP2010041044A5/ja
Application granted granted Critical
Publication of JP5700617B2 publication Critical patent/JP5700617B2/ja
Expired - Fee Related legal-status Critical Current
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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/14—Shape of semiconductor bodies; Shapes, relative sizes or dispositions of semiconductor regions within semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
JP2009159047A 2008-07-08 2009-07-03 Ｓｏｉ基板の作製方法 Expired - Fee Related JP5700617B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009159047A JP5700617B2 (ja) 2008-07-08 2009-07-03 Ｓｏｉ基板の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008178027 2008-07-08
JP2008178027 2008-07-08
JP2009159047A JP5700617B2 (ja) 2008-07-08 2009-07-03 Ｓｏｉ基板の作製方法

Publications (3)

Publication Number Publication Date
JP2010041044A JP2010041044A (ja) 2010-02-18
JP2010041044A5 JP2010041044A5 (enExample) 2012-07-05
JP5700617B2 true JP5700617B2 (ja) 2015-04-15

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009159047A Expired - Fee Related JP5700617B2 (ja) 2008-07-08 2009-07-03 Ｓｏｉ基板の作製方法

Country Status (2)

Country Link
US (3) US8030169B2 (enExample)
JP (1) JP5700617B2 (enExample)

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JP5700617B2 (ja) * 2008-07-08 2015-04-15 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
US9142804B2 (en) * 2010-02-09 2015-09-22 Samsung Display Co., Ltd. Organic light-emitting device including barrier layer and method of manufacturing the same
JP6032963B2 (ja) 2012-06-20 2016-11-30 キヤノン株式会社 Ｓｏｉ基板、ｓｏｉ基板の製造方法および半導体装置の製造方法
CN103354243B (zh) * 2013-06-28 2016-01-06 京东方科技集团股份有限公司 一种薄膜晶体管、其制备方法及相关装置
US10081861B2 (en) * 2015-04-08 2018-09-25 Varian Semiconductor Equipment Associates, Inc. Selective processing of a workpiece
US9870940B2 (en) 2015-08-03 2018-01-16 Samsung Electronics Co., Ltd. Methods of forming nanosheets on lattice mismatched substrates
US9453190B1 (en) * 2015-11-12 2016-09-27 International Business Machines Corporation Surface treatment of textured silicon
US10879250B2 (en) * 2017-08-29 2020-12-29 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure for memory device and method for forming the same
JP2022141009A (ja) * 2021-03-15 2022-09-29 キオクシア株式会社 半導体記憶装置及びその製造方法

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Also Published As

Publication number Publication date
US8884371B2 (en) 2014-11-11
US20110316082A1 (en) 2011-12-29
US20100006940A1 (en) 2010-01-14
US8030169B2 (en) 2011-10-04
JP2010041044A (ja) 2010-02-18
US8633542B2 (en) 2014-01-21
US20140103409A1 (en) 2014-04-17

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