CN103354243B - 一种薄膜晶体管、其制备方法及相关装置 - Google Patents
一种薄膜晶体管、其制备方法及相关装置 Download PDFInfo
- Publication number
- CN103354243B CN103354243B CN201310269381.9A CN201310269381A CN103354243B CN 103354243 B CN103354243 B CN 103354243B CN 201310269381 A CN201310269381 A CN 201310269381A CN 103354243 B CN103354243 B CN 103354243B
- Authority
- CN
- China
- Prior art keywords
- film transistor
- active layer
- thin film
- layer
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 81
- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 239000000463 material Substances 0.000 claims abstract description 52
- 239000004065 semiconductor Substances 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims description 34
- 238000000034 method Methods 0.000 claims description 25
- 239000010408 film Substances 0.000 claims description 22
- 238000000059 patterning Methods 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 12
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 9
- 238000000137 annealing Methods 0.000 claims description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 239000001301 oxygen Substances 0.000 claims description 6
- 238000004549 pulsed laser deposition Methods 0.000 claims description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 13
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 8
- 229920005591 polysilicon Polymers 0.000 abstract description 5
- 239000002800 charge carrier Substances 0.000 abstract 1
- 239000013081 microcrystal Substances 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 20
- 238000002161 passivation Methods 0.000 description 18
- 238000005530 etching Methods 0.000 description 12
- 238000005229 chemical vapour deposition Methods 0.000 description 11
- 230000004888 barrier function Effects 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 229910052681 coesite Inorganic materials 0.000 description 8
- 229910052906 cristobalite Inorganic materials 0.000 description 8
- 239000000377 silicon dioxide Substances 0.000 description 8
- 229910052682 stishovite Inorganic materials 0.000 description 8
- 229910052905 tridymite Inorganic materials 0.000 description 8
- 230000005525 hole transport Effects 0.000 description 6
- 239000002131 composite material Substances 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000002207 thermal evaporation Methods 0.000 description 3
- 229920001621 AMOLED Polymers 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000010561 standard procedure Methods 0.000 description 2
- 125000001637 1-naphthyl group Chemical group [H]C1=C([H])C([H])=C2C(*)=C([H])C([H])=C([H])C2=C1[H] 0.000 description 1
- MSDMPJCOOXURQD-UHFFFAOYSA-N C545T Chemical compound C1=CC=C2SC(C3=CC=4C=C5C6=C(C=4OC3=O)C(C)(C)CCN6CCC5(C)C)=NC2=C1 MSDMPJCOOXURQD-UHFFFAOYSA-N 0.000 description 1
- CUJRVFIICFDLGR-UHFFFAOYSA-N acetylacetonate Chemical compound CC(=O)[CH-]C(C)=O CUJRVFIICFDLGR-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78681—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02543—Phosphides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02592—Microstructure amorphous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/477—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Thin Film Transistor (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
本发明公开了一种薄膜晶体管、其制备方法及相关装置,在薄膜晶体管中的有源层采用非晶态磷化物半导体材料制备。由于磷化物半导体材料的载流子的迁移率比较高,因此,相对于现有的薄膜晶体管的有源层采用非晶硅、多晶硅、微晶硅或氧化物半导体材料制备,采用非晶态磷化物半导体材料制备薄膜晶体管的有源层,可以得到载流子迁移率较高的薄膜晶体管。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种薄膜晶体管、其制备方法及相关装置。
背景技术
随着平板显示行业的发展,对显示面板的要求越来越高,其中对面板中薄膜晶体管的迁移率也提出了更高的要求。目前,现有的薄膜晶体管(ThinFilmTransistor,TFT)一般为非晶硅薄膜晶体管,非晶硅薄膜晶体管即薄膜晶体管的有源层为非晶硅材料,非晶硅薄膜晶体管的载流子的迁移率较低,其电子迁移率为0.1-1cm2V-1s-1,不能适应目前显示行业的发展。因此开发了低温多晶硅(LTPS,LowTemperaturePolySilicon)薄膜晶体管和氧化物(Oxide)薄膜晶体管。
LTPS薄膜晶体管即薄膜晶体管的有源层为低温多晶硅材料,低温多晶硅是指在较低温度下将非晶硅转变为多晶硅,LTPS薄膜晶体管其载流子迁移率很高约为100-500cm2V-1s-1,但是其均匀性问题很难解决,因而在面向大尺寸面板的应用时,出现了很难克服的障碍。氧化物薄膜晶体管即薄膜晶体管的有源层为氧化物半导体材料,氧化物薄膜晶体管在保证较好的大尺寸均匀性的前提下,牺牲了部分迁移率,目前,氧化物薄膜晶体管在保证较好均匀性的前提下,可以做到其载流子迁移率为10cm2V-1s-1。但是随着平板显示技术的发展,氧化物薄膜晶体管的载流子的迁移率日渐不能满足需求。因此,目前的薄膜晶体管需要在良好均匀性的前提下进一步提高载流子迁移率。
发明内容
本发明实施例提供了一种薄膜晶体管、其制备方法及相关装置,用以获得载流子迁移率较高的薄膜晶体管。
本发明实施例提供的一种薄膜晶体管,包括:衬底基板,以及形成于所
述衬底基板上的栅极、有源层、源极和漏极;
所述有源层的材料为非晶态磷化物半导体材料。
本发明实施例提供的一种阵列基板,包括本发明实施例提供的薄膜晶体管。
本发明实施例提供的一种显示面板,包括本发明实施例提供的阵列基板。
本发明实施例提供的一种本发明实施例所提供的薄膜晶体管的制备方法,所述薄膜晶体管的有源层采用磁控溅射方式、脉冲激光沉积方式、化学气相沉积方式或溶液沉积方式制备。
本发明实施例的有益效果包括:
本发明实施例提供的一种薄膜晶体管、其制备方法及相关装置,在薄膜晶体管中的有源层采用非晶态磷化物半导体材料制备。由于磷化物半导体材料的载流子的迁移率比较高,因此,相对于现有的薄膜晶体管的有源层采用非晶硅、多晶硅、微晶硅或氧化物半导体材料制备,采用非晶态磷化物半导体材料制备薄膜晶体管的有源层,可以得到载流子迁移率较高的薄膜晶体管。
附图说明
图1为本发明实施例提供的薄膜晶体管的结构示意图;
图2为本发明实施例提供的阵列基板的结构示意图;
图3a为本发明实施例提供的薄膜晶体管的转移特性曲线示意图;
图3b为本发明实施例提供的薄膜晶体管的输出特性曲线示意图;
图4为现有技术的非晶硅薄膜晶体管的输出特性曲线示意图。
具体实施方式
下面结合附图,对本发明实施例提供的薄膜晶体管、其制备方法及相关装置的具体实施方式进行详细地说明。
附图中各层薄膜厚度和形状不反映薄膜晶体管的真实比例,目的只是示意说明本发明内容。
本发明实施例提供的一种薄膜晶体管,如图1所示,包括:衬底基板1,以及形成于衬底基板1上的栅极2、有源层3、漏极4和源极5;其中,
有源层3的材料为非晶态磷化物半导体材料。
本发明实施例提供的上述薄膜晶体管中,有源层采用非晶态磷化物半导体材料制备。由于磷化物半导体材料的载流子的迁移率比较高,因此,相对于现有的薄膜晶体管的有源层材料为非晶硅、多晶硅、微晶硅或氧化物半导体材料制备,采用非晶态磷化物半导体材料制备薄膜晶体管的有源层,可以得到载流子迁移率较高的薄膜晶体管。
具体地,在具体实施时,在本发明实施例提供的上述薄膜晶体管中,有源层的厚度一般控制在5nm-200nm之间为佳。
具体地,在具体实施时,在本发明实施例提供的上述薄膜晶体管中,有源层可以为非晶态二元磷化物半导体材料,例如:InP、Zn3P2、Ga3P2,也可以为非晶体态多元磷化物半导体材料,例如:InGaZnP或InGaZnOP,在此不做限定。
进一步地,在本发明实施例提供的上述薄膜晶体管中,有源层还可以为非晶态化合物掺杂磷半导体材料,在具体实施时,可以通过配比调整在非晶态化合物半导体材料中掺杂磷元素的比例,在此不做详述。
具体地,本发明实施例提供的上述薄膜晶体管TFT器件可以适用于各种类型结构,即TFT器件可以为底栅型结构、顶栅型结构、交叠型结构、反交叠型结构、共面型结构或反共面型结构,在此不做限定。在图1中是以底栅型结构的薄膜晶体管为例进行说明的。
具体地,在具体实施时,在本发明实施例提供的上述薄膜晶体管中,衬底基板可以为透明材料,例如:玻璃或石英,衬底基板也可以为其它不透明材料,例如:陶瓷或金属,在此不做限定。
进一步地,在本发明实施例提供的上述薄膜晶体管中,栅极可以为金属材料,例如:Mo、Al、或Cr,也可以为合金材料,或者还可以为复合金属层,例如:Mo/Al,在此不做限定。在具体实施时,栅极的厚度一般控制在1nm-500nm之间为佳。
进一步地,本发明实施例提供的薄膜晶体管,如图1所示,还可以包括:形成于栅极2与有源层3之间的栅极绝缘层6。具体地,栅极绝缘层6可以为氧化硅、氮化硅等绝缘材料,栅极绝缘层6的厚度一般控制在1nm-300nm之间为佳。
进一步地,本发明实施例提供的薄膜晶体管,如图1所示,还可以包括:形成于有源层3与漏极4和源极5之间的刻蚀阻挡层7。具体地,刻蚀阻挡层7可以为氧化硅、氮化硅或者有机绝缘材料,刻蚀阻挡层7的厚度一般控制在5nm-500nm之间为佳。
具体地,在本发明实施例提供的上述薄膜晶体管中,源极和漏极可以分别为金属材料,例如:Mo、Al、或Cr,也可以为合金材料,或者还可以为复合金属层,例如:Mo/Al,在此不做限定。更近一步地,在具体实施时,源极和漏极的厚度一般分别控制在1nm-500nm之间为佳。
基于同一发明构思,本发明实施例还提供了一种阵列基板,包括本发明实施例提供的上述薄膜晶体管,该阵列基板的实施可以参见上述薄膜晶体管的实施例,重复之处不再赘述。
在具体实施时,在本发明实施例提供的阵列基板中,如图2所示,可以具体包括:形成于薄膜晶体管上的像素电极8,该像素电极8与源极5相连。
进一步地,在上述阵列基板中,如图2所示,还可以包括:形成于源极5和像素电极8之间的钝化层9,像素电极8通过钝化层9中的过孔与源极5相连。具体地,在具体实施时,钝化层9可以为氧化硅、氮化硅或有机材料等绝缘材料,钝化层9的厚度一般控制在5nm-500nm之间为佳。
更进一步地,在具体实施时,本发明实施例提供的上述阵列基板,根据需要,还可以包括位于衬底基板与栅极之间的缓冲层,位于像素电极上的平坦化层、像素界定层等,在此不做限定。
具体地,本发明实施提供的上述阵列基板可以应用于液晶显示(LiquidCrystalDisplay,LCD)面板,当然也可以应用于有机发光二极管(OrganicLightEmittingDiode,OLED)显示面板,在此不做限定。
基于同一发明构思,本发明实施例还提供了一种显示面板,包括本发明实施例提供的上述阵列基板,该显示面板可以是液晶显示面板,也可以是OLED显示面板,对于显示面板的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的,在此不做赘述,也不应作为对本发明的限制。该显示面板的实施可以参见上述阵列基板的实施例,重复之处不再赘述。
在本发明实施例提供的显示面板为OIED显示面板时,在具体实施时,在OLED显示面板中,还可以包括:依次形成于阵列基板上的阳极、空穴传输层、有机发光层、电子传输层以及阴极,当然也可以根据需要设置其他的膜层,在此不做限定。
基于同一发明构思,本发明实施例还提供了上述薄膜晶体管的制备方法,在制备薄膜晶体管时,有源层采用非晶态磷化物半导体材料制备,具体可以采用磁控溅射方式、脉冲激光沉积方式、化学气相沉积(Chemicalvapordeposition,CVD)方式或溶液沉积方式来进行有源层的制备。
在具体实施时,当有源层的材料为InGaZnP时,可以采用磁控溅射方式制备有源层的图形,具体包括:在压力为1Pa-10Pa的氧气氛围条件下,采用磁控溅射方式沉积InGaZnP薄膜;较佳地,InGaZnP薄膜的厚度一般控制在约50nm为佳;然后在温度为100摄氏度-600摄氏度的空气氛围条件下对InGaZnP薄膜退火1小时;最后对InGaZnP薄膜进行构图,形成有源层的图形。
具体地,当有源层的材料为InP时,可以采用脉冲激光沉积方式制备有源层的图形,具体包括:在压力为1Pa-10Pa的氧气氛围条件下,采用脉冲激光沉积方式沉积InP薄膜;较佳地,InP薄膜的厚度一般控制在约50nm为佳;然后在温度为100摄氏度-600摄氏度的空气氛围条件下,对InP薄膜退火10分钟;最后对InP薄膜进行构图,形成有源层的图形。具体地,采用上述方式制备出的非晶态InP薄膜晶体管的工作性能曲线如图3a和图3b所示,从图中可以看出薄膜晶体管的载流子的迁移率较高。该器件还未经过优化,其载流子的迁移率已达到非晶硅薄膜晶体管的水平,图4为现有的非晶硅薄膜晶体管的输出特性曲线示意图。
进一步地,上述制备方法制备出的薄膜晶体管可以应用于LCD面板,当然也可以应用于OLED显示面板,在此不做限定。下面通过两个实例对薄膜晶体管的制备工艺的各步骤进行详细的说明。在两个实例中都是以底栅型结构的薄膜晶体管为例进行说明的。
实例一:
薄膜晶体管应用于有源有机发光二极管(ActiveMatrixOrganicLightEmittingDiode,AMOLED)显示面板,其制备方法具体包括以下步骤:
S01、在衬底基板上形成栅极的图形;
在具体实施时,栅极多采用磁控溅射的方式来制备,通过构图工艺形成栅极的图形。具体地,栅极的材料可以为Mo。进一步地,栅极的厚度可以控制在200nm左右。
进一步地,在步骤S01制备栅极的图形之前,根据需要还可以包括:在衬底基板上形成缓冲层的步骤;
在具体实施时,可以先将衬底基板采用标准方法清洗,之后采用CVD方式在衬底基板上沉积缓冲层。具体地,缓冲层的材料可以为SiO2。进一步地,缓冲层的厚度一般控制在200nm为佳。
S02、在栅极上形成栅极绝缘层;
在具体实施时,栅极绝缘层多采用CVD方式来制备。具体地,栅极绝缘层的材料可以为SiO2。进一步地,栅极绝缘层的厚度可以控制在150nm左右。
S03、在栅极绝缘层上形成有源层的图形;
在具体实施时,有源层的材料具体可以为InGaZnP,可以采用磁控溅射方式制备有源层的图形:首先在压力为1Pa-10Pa的氧气氛围条件下,采用磁控溅射方式沉积InGaZnP薄膜;较佳地,InGaZnP薄膜的厚度可以控制在约50nm;然后在温度为100摄氏度-600摄氏度的空气氛围条件下对InGaZnP薄膜退火1小时;最后通过构图工艺形成有源层的图形。
S04、在有源层上形成刻蚀阻挡层的图形;
在具体实施时,刻蚀阻挡层多采用CVD方式来制备,并通过构图工艺形成刻蚀阻挡层的图形。具体地,刻蚀阻挡层的材料可以为SiO2。进一步地,刻蚀阻挡层的厚度一般控制在50nm为佳。
S05、在刻蚀阻挡层上形成源极和漏极的图形;
在具体实施时,源极和漏极多采用溅射方式来制备,并通过一次构图工艺形成源极和漏极的图形。具体地,源极和漏极的材料可以为复合金属层Mo/Al。进一步地,源极和漏极厚度一般分别控制在200nm为佳。
进一步地,形成薄膜晶体管之后,需要通过以下步骤形成AMOLED的发光结构,具体包括以下步骤:
S06、在源极和漏极上形成钝化层的图形;
在具体实施时,钝化层多采用CVD方式来制备。具体地,钝化层的材料可以为SiO2,并通常采用干法刻蚀的方式来形成钝化层中连接将要形成的像素电极和源极的过孔。进一步地,钝化层的厚度一般控制在100nm-500nm之间为佳。
S07、在钝化层上形成像素电极的图形,像素电极通过钝化层中的过孔与源极相连;
在具体实施时,像素电极多采用溅射方式来制备,并通过构图工艺形成像素电极的图形。具体地,像素电极的材料可以采用铟锡氧化物(ITO)。
S08、在像素电极上旋涂沉积亚克力系材料的像素界定层,然后通过构图工艺形成像素界定层的图形。具体地,像素界定层的厚度可以控制在1.5μm左右。
具体地,在具体实施时,在步骤S08结束之后,还可以包括以下的步骤:
S09、形成空穴传输层;
在具体实施时,空穴传输层在1x10-5Pa且约170摄氏度的OLED或EL有机金属薄膜沉积高真空系统中热蒸发蒸镀制备,具体地,空穴传输层的材料可以为NPB(N,N’-二苯基-N-N’二(1-萘基)-1,1’二苯基-4,4’-二胺)。进一步地,空穴传输层的厚度一般控制在50nm为佳。
S10、在空穴传输层上形成有机发光层的图形;
在具体实施时,有机发光层在1x10-5Pa的OLED或电致发光(EL,Electrolumiescent)有机金属薄膜沉积高真空系统中热蒸发蒸镀制备,并可以采用分像素区掩模蒸镀工艺形成依次排列的绿光、蓝光、红光亚像素区,具体地,有机发光层的绿光、蓝光和红光像素区的材料可以分别采用掺杂磷光材料的主体材料CBP:(ppy)2Ir(acac)、CBP:FIrpic和CBP:Btp2Ir(acac)。进一步地,有机发光层的厚度一般控制在25nm为佳。
S11、在有机发光层上形成电子传输层;
在具体实施时,电子传输层在1x10-5Pa且约190摄氏度的OLED或EL有机金属薄膜沉积高真空系统中热蒸发蒸镀制备,具体地,电子传输层的材料可以为Bphen。进一步地,电子传输层的厚度一般控制在25nm为佳。
S12、在电子传输层上形成阴极;
在具体实施时,阴极在1x10-5Pa且约900摄氏度的OLED或EL有机金属薄膜沉积高真空系统中热蒸发蒸镀制备,具体地,阴极的材料可以为复合金属层Sm/Al。进一步地,阴极的厚度一般控制在约200nm为佳。
实例二:
薄膜晶体管应用于LCD显示面板,其制备方法具体包括以下步骤:
S01、在衬底基板上形成栅极的图形;
在具体实施时,栅极多采用磁控溅射的方式来制备,通过构图工艺形成栅极的图形。具体地,栅极的材料可以为Mo。进一步地,栅极的厚度可以控制在200nm左右。
进一步地,在步骤S01制备栅极的图形之前,根据需要还可以包括:在衬底基板上形成缓冲层的步骤;
在具体实施时,可以先将衬底基板采用标准方法清洗,之后采用CVD方式在衬底基板上沉积缓冲层。具体地,缓冲层的材料可以为SiO2。进一步地,缓冲层的厚度一般控制在200nm为佳。
S02、在栅极上形成栅极绝缘层;
在具体实施时,栅极绝缘层多采用CVD方式来制备。具体地,栅极绝缘层的材料可以为SiO2。进一步地,栅极绝缘层的厚度可以控制在150nm左右。
S03、在栅极绝缘层上形成有源层的图形;
在具体实施时,有源层的材料具体可以为InP,可以采用脉冲激光沉积方式制备有源层的图形:在具体操作时,可以将基板送入真空度为(1~10)*10-4Pa的真空腔内,然后通入5~30sccm的氧气(O2),例如5sccm、10sccm、20sccm或30sccm,将真空腔的压力控制到0.5~1.5Pa,例如0.5Pa、1Pa或1.5Pa;,采用脉冲频率为1~10Hz、脉冲能量为200~500mJ的脉冲激光,例如脉冲激光的频率为5Hz、脉冲能量为350mJ,沉积InP薄膜1~5分钟,沉积时间例如可以为1分钟、2分钟、3分钟或5分钟;较佳地,InP薄膜的厚度可以控制在约30~80nm,例如可以为30nm、50nm或80nm;然后在温度为100摄氏度-600摄氏度的空气氛围条件下,例如温度可以为100摄氏度、300摄氏度、500摄氏度或600摄氏度,对InP薄膜退火5~20分钟,退火的时间可以为5分钟、10分钟、15分钟或20分钟;最后通过构图工艺形成有源层的图形。
S04、在有源层上形成刻蚀阻挡层的图形;
在具体实施时,刻蚀阻挡层多采用CVD方式来制备,并通过构图工艺形成刻蚀阻挡层的图形。具体地,刻蚀阻挡层的材料可以为SiO2。进一步地,刻蚀阻挡层的厚度一般控制在50nm为佳。
S05、在刻蚀阻挡层上形成源极和漏极的图形;
在具体实施时,源极和漏极多采用溅射方式来制备,并通过一次构图工艺形成源极和漏极的图形。具体地,源极和漏极的材料可以为复合金属层Mo/Al。进一步地,源极和漏极厚度一般分别控制在200nm为佳。
进一步地,形成薄膜晶体管之后,需要通过以下步骤形成LCD的像素结构,具体包括以下步骤:
S06、在源极和漏极上形成钝化层的图形;
在具体实施时,钝化层多采用CVD方式来制备。具体地,钝化层的材料可以为SiO2,并通常采用干法刻蚀的方式来形成钝化层中连接将要形成的像素电极和源极的过孔。进一步地,钝化层的厚度一般控制在100nm-500nm之间为佳。
S07、在钝化层上形成像素电极的图形,像素电极通过钝化层中的过孔与源极相连;
在具体实施时,像素电极多采用溅射方式来制备,并通过构图工艺形成像素电极的图形。具体地,像素电极的材料可以采用铟锡氧化物(ITO)。
在完成步骤S07之后,还需要进行PI涂布、压印取向以及Spacer制备、以及与TFT阵列基板相对设置的彩膜基板的制备,并将彩膜基板和TFT阵列基板对盒处理,灌注液晶分子,涂覆封框胶等步骤。这些工艺都属于现有技术,其具体制备工艺在此不再赘述。
本发明实施例提供的一种薄膜晶体管、其制备方法及相关装置,在薄膜晶体管中的有源层采用非晶态磷化物半导体材料制备。由于磷化物半导体材料的载流子的迁移率比较高,因此,相对于现有的薄膜晶体管的有源层采用非晶硅、多晶硅、微晶硅或氧化物半导体材料制备,采用非晶态磷化物半导体材料制备薄膜晶体管的有源层,可以得到载流子迁移率较高的薄膜晶体管。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (1)
1.一种薄膜晶体管的制备方法,包括在衬底基板上栅极、有源层、源极和漏极的图形;其特征在于:所述有源层的材料为非晶态磷化物半导体材料;
当所述有源层的材料为InGaZnP时,采用磁控溅射方式制备所述有源层的图形,具体包括:在压力为1Pa-10Pa的氧气氛围条件下,沉积InGaZnP薄膜;在100摄氏度-600摄氏度的空气氛围条件下,对所述InGaZnP薄膜退火1小时;对所述InGaZnP薄膜进行构图,形成所述有源层的图形;
当所述有源层的材料为InP时,采用脉冲激光沉积方式制备所述有源层的图形,具体包括:在压力为1Pa-10Pa的氧气氛围条件下,沉积InP薄膜;在100摄氏度-600摄氏度的空气氛围条件下,对所述InP薄膜退火10分钟;对所述InP薄膜进行构图,形成所述有源层的图形。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310269381.9A CN103354243B (zh) | 2013-06-28 | 2013-06-28 | 一种薄膜晶体管、其制备方法及相关装置 |
US14/377,946 US9461070B2 (en) | 2013-06-28 | 2013-12-11 | Thin film transistor, method for manufacturing the same, and device comprising the same |
PCT/CN2013/089030 WO2014206021A1 (zh) | 2013-06-28 | 2013-12-11 | 一种薄膜晶体管、其制备方法及包含该薄膜晶体管的装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310269381.9A CN103354243B (zh) | 2013-06-28 | 2013-06-28 | 一种薄膜晶体管、其制备方法及相关装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103354243A CN103354243A (zh) | 2013-10-16 |
CN103354243B true CN103354243B (zh) | 2016-01-06 |
Family
ID=49310590
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310269381.9A Expired - Fee Related CN103354243B (zh) | 2013-06-28 | 2013-06-28 | 一种薄膜晶体管、其制备方法及相关装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US9461070B2 (zh) |
CN (1) | CN103354243B (zh) |
WO (1) | WO2014206021A1 (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104393002A (zh) * | 2014-10-29 | 2015-03-04 | 合肥京东方光电科技有限公司 | 一种显示基板及其制作方法、显示装置 |
US9666658B2 (en) * | 2015-01-05 | 2017-05-30 | Samsung Display Co., Ltd. | Organic light emitting diode display and manufacturing method thereof |
US10424670B2 (en) | 2016-12-30 | 2019-09-24 | Intel Corporation | Display panel with reduced power consumption |
CN107275339B (zh) * | 2017-04-20 | 2020-06-12 | 惠科股份有限公司 | 主动开关阵列基板及制造方法与应用的显示面板 |
CN109801875B (zh) * | 2018-12-26 | 2021-06-04 | 惠科股份有限公司 | 阵列基板的制作方法、阵列基板和显示面板 |
CN112038216A (zh) * | 2020-09-08 | 2020-12-04 | 重庆邮电大学 | 一种p型非晶态半导体薄膜及其薄膜晶体管制备方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4065781A (en) * | 1974-06-21 | 1977-12-27 | Westinghouse Electric Corporation | Insulated-gate thin film transistor with low leakage current |
CN101960605A (zh) * | 2008-03-26 | 2011-01-26 | 国立大学法人东京大学 | 半导体基板、半导体装置、及半导体装置的制造方法 |
CN102074480A (zh) * | 2009-11-20 | 2011-05-25 | E.I.内穆尔杜邦公司 | 薄膜晶体管组成及其相关方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60251666A (ja) * | 1984-05-28 | 1985-12-12 | Seiko Epson Corp | 薄膜トランジスタ |
US5536953A (en) | 1994-03-08 | 1996-07-16 | Kobe Steel Usa | Wide bandgap semiconductor device including lightly doped active region |
JP4919738B2 (ja) * | 2006-08-31 | 2012-04-18 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP5700617B2 (ja) * | 2008-07-08 | 2015-04-15 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
JP5663231B2 (ja) | 2009-08-07 | 2015-02-04 | 株式会社半導体エネルギー研究所 | 発光装置 |
JP6234100B2 (ja) * | 2012-07-31 | 2017-11-22 | 株式会社半導体エネルギー研究所 | 発光素子、複素環化合物、ディスプレイモジュール、照明モジュール、発光装置、表示装置、照明装置及び電子機器 |
-
2013
- 2013-06-28 CN CN201310269381.9A patent/CN103354243B/zh not_active Expired - Fee Related
- 2013-12-11 US US14/377,946 patent/US9461070B2/en active Active
- 2013-12-11 WO PCT/CN2013/089030 patent/WO2014206021A1/zh active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4065781A (en) * | 1974-06-21 | 1977-12-27 | Westinghouse Electric Corporation | Insulated-gate thin film transistor with low leakage current |
CN101960605A (zh) * | 2008-03-26 | 2011-01-26 | 国立大学法人东京大学 | 半导体基板、半导体装置、及半导体装置的制造方法 |
CN102074480A (zh) * | 2009-11-20 | 2011-05-25 | E.I.内穆尔杜邦公司 | 薄膜晶体管组成及其相关方法 |
Also Published As
Publication number | Publication date |
---|---|
CN103354243A (zh) | 2013-10-16 |
US9461070B2 (en) | 2016-10-04 |
US20150318309A1 (en) | 2015-11-05 |
WO2014206021A1 (zh) | 2014-12-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103354243B (zh) | 一种薄膜晶体管、其制备方法及相关装置 | |
US9881985B2 (en) | OLED device, AMOLED display device and method for manufacturing same | |
US9024288B2 (en) | Array substrate and manufacturing method thereof, display device | |
CN104362125B (zh) | 阵列基板及其制作方法、显示装置 | |
WO2018120365A1 (zh) | Oled背板及其制作方法 | |
WO2017016235A1 (en) | Light emitting diode, display substrate and display device having the same, and fabricating method thereof | |
TWI489634B (zh) | 薄膜電晶體、其製造方法及顯示裝置 | |
CN102646683B (zh) | 一种阵列基板及其制造方法 | |
CN104600081A (zh) | 阵列基板及其制作方法、显示面板、显示装置 | |
CN104867959A (zh) | 双栅极氧化物半导体tft基板的制作方法及其结构 | |
CN104952791A (zh) | Amoled显示器件的制作方法及其结构 | |
WO2018090444A1 (zh) | Oled基板及其制作方法 | |
WO2017088807A1 (zh) | 有机电致发光器件及其制作方法、显示装置 | |
TWI239790B (en) | Organic light-emitting device and fabrication method thereof | |
CN103065972B (zh) | 一种金属氧化物半导体薄膜及其制备方法与应用 | |
CN104392931B (zh) | 薄膜晶体管及其制备方法、阵列基板、显示装置 | |
US20180182786A1 (en) | Method for manufacturing tft substrate | |
WO2020172918A1 (zh) | 一种显示面板及其制作方法 | |
KR20090016993A (ko) | 박막 트랜지스터 및 그 제조방법, 이를 포함하는 표시장치 | |
CN204289541U (zh) | 阵列基板、显示面板、显示装置 | |
KR101849580B1 (ko) | 유기 발광 표시장치의 제조방법 | |
CN110819950A (zh) | 一种硫化锌薄膜的制备方法及具有硫化锌薄膜的薄膜晶体管 | |
WO2018045612A1 (zh) | 氧化物薄膜晶体管的制备方法 | |
CN107591490B (zh) | 有机电致发光器件及其制造方法 | |
TWI636507B (zh) | 薄膜電晶體的製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160106 |