JP5627835B2 - 半導体装置および半導体装置の製造方法 - Google Patents

半導体装置および半導体装置の製造方法 Download PDF

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JP5627835B2
JP5627835B2 JP2007298361A JP2007298361A JP5627835B2 JP 5627835 B2 JP5627835 B2 JP 5627835B2 JP 2007298361 A JP2007298361 A JP 2007298361A JP 2007298361 A JP2007298361 A JP 2007298361A JP 5627835 B2 JP5627835 B2 JP 5627835B2
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film
wiring
intervening
semiconductor device
passivation
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JP2009124042A (ja
JP2009124042A5 (https=
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克己 鮫島
克己 鮫島
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Rohm Co Ltd
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Rohm Co Ltd
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Priority to JP2007298361A priority Critical patent/JP5627835B2/ja
Priority to US12/272,001 priority patent/US9035455B2/en
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Publication of JP2009124042A5 publication Critical patent/JP2009124042A5/ja
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Priority to US14/690,982 priority patent/US9437544B2/en
Priority to US15/236,016 priority patent/US9607957B2/en
Priority to US15/451,770 priority patent/US9941231B2/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43—Layouts of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
    • H10W72/01938—Manufacture or treatment of bond pads using blanket deposition in gaseous form, e.g. by CVD or PVD
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01951—Changing the shapes of bond pads
    • H10W72/01953—Changing the shapes of bond pads by etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07355—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/234—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
JP2007298361A 2007-11-16 2007-11-16 半導体装置および半導体装置の製造方法 Active JP5627835B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2007298361A JP5627835B2 (ja) 2007-11-16 2007-11-16 半導体装置および半導体装置の製造方法
US12/272,001 US9035455B2 (en) 2007-11-16 2008-11-17 Semiconductor device
US14/690,982 US9437544B2 (en) 2007-11-16 2015-04-20 Semiconductor device
US15/236,016 US9607957B2 (en) 2007-11-16 2016-08-12 Semiconductor device
US15/451,770 US9941231B2 (en) 2007-11-16 2017-03-07 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007298361A JP5627835B2 (ja) 2007-11-16 2007-11-16 半導体装置および半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013183162A Division JP5891211B2 (ja) 2013-09-04 2013-09-04 半導体装置

Publications (3)

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JP2009124042A JP2009124042A (ja) 2009-06-04
JP2009124042A5 JP2009124042A5 (https=) 2010-12-24
JP5627835B2 true JP5627835B2 (ja) 2014-11-19

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JP (1) JP5627835B2 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5627835B2 (ja) * 2007-11-16 2014-11-19 ローム株式会社 半導体装置および半導体装置の製造方法
US8592995B2 (en) * 2009-07-02 2013-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method and structure for adhesion of intermetallic compound (IMC) on Cu pillar bump
JP2011222738A (ja) 2010-04-09 2011-11-04 Renesas Electronics Corp 半導体装置の製造方法
US9219044B2 (en) * 2013-11-18 2015-12-22 Applied Materials, Inc. Patterned photoresist to attach a carrier wafer to a silicon device wafer
KR102410018B1 (ko) * 2015-09-18 2022-06-16 삼성전자주식회사 반도체 패키지
US10903151B2 (en) * 2018-05-23 2021-01-26 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
JP7319808B2 (ja) * 2019-03-29 2023-08-02 ローム株式会社 半導体装置および半導体パッケージ
US11393780B2 (en) 2019-07-26 2022-07-19 Sandisk Technologies Llc Bonded assembly containing oxidation barriers, hybrid bonding, or air gap, and methods of forming the same
US11515273B2 (en) 2019-07-26 2022-11-29 Sandisk Technologies Llc Bonded assembly containing oxidation barriers, hybrid bonding, or air gap, and methods of forming the same
US11139272B2 (en) 2019-07-26 2021-10-05 Sandisk Technologies Llc Bonded assembly containing oxidation barriers and/or adhesion enhancers and methods of forming the same

Family Cites Families (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54111761A (en) * 1978-02-22 1979-09-01 Hitachi Ltd Electrode construction of semiconductor device
JPH01278751A (ja) * 1988-05-02 1989-11-09 Matsushita Electron Corp 半導体装置
KR100199258B1 (ko) * 1990-02-09 1999-06-15 가나이 쓰도무 반도체집적회로장치
US5508561A (en) * 1993-11-15 1996-04-16 Nec Corporation Apparatus for forming a double-bump structure used for flip-chip mounting
JPH09139387A (ja) 1995-11-13 1997-05-27 Denso Corp 半導体装置の電極形成方法
JP3321351B2 (ja) * 1996-01-18 2002-09-03 東芝マイクロエレクトロニクス株式会社 半導体装置およびその製造方法
US6111317A (en) * 1996-01-18 2000-08-29 Kabushiki Kaisha Toshiba Flip-chip connection type semiconductor integrated circuit device
TW448524B (en) * 1997-01-17 2001-08-01 Seiko Epson Corp Electronic component, semiconductor device, manufacturing method therefor, circuit board and electronic equipment
US6436300B2 (en) * 1998-07-30 2002-08-20 Motorola, Inc. Method of manufacturing electronic components
JP2000133672A (ja) * 1998-10-28 2000-05-12 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
US6479900B1 (en) * 1998-12-22 2002-11-12 Sanyo Electric Co., Ltd. Semiconductor device and method of manufacturing the same
JP4024958B2 (ja) * 1999-03-15 2007-12-19 株式会社ルネサステクノロジ 半導体装置および半導体実装構造体
US6133136A (en) * 1999-05-19 2000-10-17 International Business Machines Corporation Robust interconnect structure
US6362087B1 (en) * 2000-05-05 2002-03-26 Aptos Corporation Method for fabricating a microelectronic fabrication having formed therein a redistribution structure
US6293457B1 (en) * 2000-06-08 2001-09-25 International Business Machines Corporation Integrated method for etching of BLM titanium-tungsten alloys for CMOS devices with copper metallization
TW517334B (en) * 2000-12-08 2003-01-11 Nec Corp Method of forming barrier layers for solder bumps
US6426556B1 (en) * 2001-01-16 2002-07-30 Megic Corporation Reliable metal bumps on top of I/O pads with test probe marks
DE60239493D1 (de) * 2002-06-21 2011-04-28 Fujitsu Semiconductor Ltd Halbleiterbauelement und verfahren zu seiner herstellung
US7547623B2 (en) * 2002-06-25 2009-06-16 Unitive International Limited Methods of forming lead free solder bumps
JP2004031651A (ja) * 2002-06-26 2004-01-29 Sony Corp 素子実装基板及びその製造方法
JP2004071872A (ja) 2002-08-07 2004-03-04 Denso Corp 電子装置
TWI281718B (en) * 2002-09-10 2007-05-21 Advanced Semiconductor Eng Bump and process thereof
JP2004152953A (ja) * 2002-10-30 2004-05-27 Citizen Watch Co Ltd 半導体装置及びその製造方法
JP2004281491A (ja) * 2003-03-13 2004-10-07 Toshiba Corp 半導体装置及びその製造方法
JP2005085857A (ja) * 2003-09-05 2005-03-31 Denso Corp バンプを用いた電極構造
JP2005116632A (ja) * 2003-10-03 2005-04-28 Rohm Co Ltd 半導体装置の製造方法および半導体装置
US20050092611A1 (en) * 2003-11-03 2005-05-05 Semitool, Inc. Bath and method for high rate copper deposition
DE10355953B4 (de) * 2003-11-29 2005-10-20 Infineon Technologies Ag Verfahren zum Galvanisieren und Kontaktvorsprungsanordnung
JP2005166959A (ja) * 2003-12-03 2005-06-23 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP2005175128A (ja) * 2003-12-10 2005-06-30 Fujitsu Ltd 半導体装置及びその製造方法
JP4049127B2 (ja) 2004-06-11 2008-02-20 ヤマハ株式会社 半導体装置の製造方法
US7830011B2 (en) * 2004-03-15 2010-11-09 Yamaha Corporation Semiconductor element and wafer level chip size package therefor
JP2006100552A (ja) * 2004-09-29 2006-04-13 Rohm Co Ltd 配線基板および半導体装置
JP2006278551A (ja) * 2005-03-28 2006-10-12 Fujitsu Ltd 半導体装置及びその製造方法
TWI288447B (en) * 2005-04-12 2007-10-11 Siliconware Precision Industries Co Ltd Conductive bump structure for semiconductor device and fabrication method thereof
JP2007019473A (ja) * 2005-06-10 2007-01-25 Nec Electronics Corp 半導体装置
US7622309B2 (en) * 2005-06-28 2009-11-24 Freescale Semiconductor, Inc. Mechanical integrity evaluation of low-k devices with bump shear
US7947978B2 (en) * 2005-12-05 2011-05-24 Megica Corporation Semiconductor chip with bond area
JP4247690B2 (ja) * 2006-06-15 2009-04-02 ソニー株式会社 電子部品及その製造方法
JP4354469B2 (ja) * 2006-08-11 2009-10-28 シャープ株式会社 半導体装置および半導体装置の製造方法
JP5627835B2 (ja) * 2007-11-16 2014-11-19 ローム株式会社 半導体装置および半導体装置の製造方法
US7985671B2 (en) * 2008-12-29 2011-07-26 International Business Machines Corporation Structures and methods for improving solder bump connections in semiconductor devices
US7989356B2 (en) * 2009-03-24 2011-08-02 Stats Chippac, Ltd. Semiconductor device and method of forming enhanced UBM structure for improving solder joint reliability
US8669137B2 (en) * 2011-04-01 2014-03-11 International Business Machines Corporation Copper post solder bumps on substrate
US9087701B2 (en) * 2011-04-30 2015-07-21 Stats Chippac, Ltd. Semiconductor device and method of embedding TSV semiconductor die within substrate for vertical interconnect in POP
US8643150B1 (en) * 2012-02-15 2014-02-04 Maxim Integrated Products, Inc. Wafer-level package device having solder bump assemblies that include an inner pillar structure

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Publication number Publication date
JP2009124042A (ja) 2009-06-04
US20090127709A1 (en) 2009-05-21
US20150228575A1 (en) 2015-08-13
US9941231B2 (en) 2018-04-10
US9035455B2 (en) 2015-05-19
US20170179060A1 (en) 2017-06-22
US20160351519A1 (en) 2016-12-01
US9607957B2 (en) 2017-03-28
US9437544B2 (en) 2016-09-06

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