JP5624077B2 - パッケージ基板 - Google Patents
パッケージ基板 Download PDFInfo
- Publication number
- JP5624077B2 JP5624077B2 JP2012088225A JP2012088225A JP5624077B2 JP 5624077 B2 JP5624077 B2 JP 5624077B2 JP 2012088225 A JP2012088225 A JP 2012088225A JP 2012088225 A JP2012088225 A JP 2012088225A JP 5624077 B2 JP5624077 B2 JP 5624077B2
- Authority
- JP
- Japan
- Prior art keywords
- metal post
- thermal diffusion
- package substrate
- layer
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- General Physics & Mathematics (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
111 導電性パッド
120 絶縁層
121 開口部
125 めっきシード層
126 ドライフィルムパターン
130 剥離防止層
140 メタルポスト
150 熱拡散防止膜
160 はんだバンプ
Claims (1)
- 少なくとも一つの導電性パッドを具備した基板と、
前記基板上に形成され、前記導電性パッドを露出させる開口部を有する絶縁層と、
前記開口部を介して露出された導電性パッドの上面及び前記絶縁層の側壁に沿って5〜10μmの厚さの 銅(Cu)で形成され、前記開口部が形成された前記絶縁層の上面より高く形成される剥離防止層と、
銅(Cu)とスズ(Sn)の合金からなり、その銅含量が0.8wt%〜5wt%である、前記剥離防止層上に形成されるメタルポストと、
前記メタルポスト上に形成される熱拡散防止膜と、
前記熱拡散防止膜上に形成されるはんだバンプと、
を含むパッケージ基板。
Applications Claiming Priority (2)
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KR10-2011-0038602 | 2011-04-25 | ||
KR1020110038602A KR101167805B1 (ko) | 2011-04-25 | 2011-04-25 | 패키지 기판 및 이의 제조방법 |
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JP2013149296A Division JP5628975B2 (ja) | 2011-04-25 | 2013-07-18 | パッケージ基板の製造方法 |
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JP2012231130A JP2012231130A (ja) | 2012-11-22 |
JP5624077B2 true JP5624077B2 (ja) | 2014-11-12 |
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JP2012088225A Expired - Fee Related JP5624077B2 (ja) | 2011-04-25 | 2012-04-09 | パッケージ基板 |
JP2013149296A Expired - Fee Related JP5628975B2 (ja) | 2011-04-25 | 2013-07-18 | パッケージ基板の製造方法 |
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US (1) | US8822841B2 (ja) |
JP (2) | JP5624077B2 (ja) |
KR (1) | KR101167805B1 (ja) |
TW (1) | TWI453882B (ja) |
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JP6182309B2 (ja) * | 2012-11-28 | 2017-08-16 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
US10128175B2 (en) * | 2013-01-29 | 2018-11-13 | Taiwan Semiconductor Manufacturing Company | Packaging methods and packaged semiconductor devices |
KR102109042B1 (ko) * | 2013-09-16 | 2020-05-12 | 엘지이노텍 주식회사 | 반도체 패키지 |
TWI646639B (zh) * | 2013-09-16 | 2019-01-01 | Lg伊諾特股份有限公司 | 半導體封裝 |
JP6587891B2 (ja) * | 2015-10-08 | 2019-10-09 | イビデン株式会社 | プリント配線板およびその製造方法 |
TWI678742B (zh) * | 2018-03-26 | 2019-12-01 | 南茂科技股份有限公司 | 半導體封裝結構 |
JP7257175B2 (ja) * | 2019-02-15 | 2023-04-13 | イビデン株式会社 | プリント配線板およびプリント配線板の製造方法 |
JP7257273B2 (ja) * | 2019-06-26 | 2023-04-13 | イビデン株式会社 | プリント配線板およびその製造方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03104230A (ja) * | 1989-09-19 | 1991-05-01 | Fujitsu Ltd | 半導体装置の製造方法 |
JP3176973B2 (ja) * | 1992-01-31 | 2001-06-18 | 株式会社東芝 | 半導体装置の製造方法 |
WO1999021224A1 (fr) * | 1997-10-17 | 1999-04-29 | Ibiden Co., Ltd. | Substrat d'un boitier |
JP2000294585A (ja) * | 1999-04-01 | 2000-10-20 | Nec Corp | バンプ構造及びその形成方法 |
US6372622B1 (en) * | 1999-10-26 | 2002-04-16 | Motorola, Inc. | Fine pitch bumping with improved device standoff and bump volume |
JP4528062B2 (ja) | 2004-08-25 | 2010-08-18 | 富士通株式会社 | 半導体装置およびその製造方法 |
GB2438788B (en) | 2005-02-24 | 2009-03-11 | Agere Systems Inc | Structure and method for fabricating flip chip devices |
KR20080020365A (ko) | 2006-08-31 | 2008-03-05 | 주식회사 하이닉스반도체 | 플립 칩 패키지용 기판 |
JP2008098210A (ja) | 2006-10-06 | 2008-04-24 | Matsushita Electric Ind Co Ltd | 突起電極形成方法、並びに半導体装置の製造方法、および半導体装置 |
US7485564B2 (en) | 2007-02-12 | 2009-02-03 | International Business Machines Corporation | Undercut-free BLM process for Pb-free and Pb-reduced C4 |
JP5277788B2 (ja) * | 2008-08-14 | 2013-08-28 | ソニー株式会社 | 半導体装置およびその製造方法 |
KR20100060968A (ko) | 2008-11-28 | 2010-06-07 | 삼성전기주식회사 | 메탈 포스트를 구비한 기판 및 그 제조방법 |
JP5097792B2 (ja) * | 2009-08-17 | 2012-12-12 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | 円筒型キャパシタを備えたウェーハレベルパッケージ及びその製造方法 |
KR20110036450A (ko) | 2009-10-01 | 2011-04-07 | 삼성전기주식회사 | 플립칩용 기판의 제조방법 및 이를 이용하여 제조한 플립칩용 기판 |
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KR101187977B1 (ko) * | 2009-12-08 | 2012-10-05 | 삼성전기주식회사 | 패키지 기판 및 그의 제조방법 |
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2011
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2012
- 2012-03-01 TW TW101106780A patent/TWI453882B/zh not_active IP Right Cessation
- 2012-03-02 US US13/411,168 patent/US8822841B2/en not_active Expired - Fee Related
- 2012-04-09 JP JP2012088225A patent/JP5624077B2/ja not_active Expired - Fee Related
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2013
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Publication number | Publication date |
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KR101167805B1 (ko) | 2012-07-25 |
TWI453882B (zh) | 2014-09-21 |
JP2012231130A (ja) | 2012-11-22 |
JP2013243387A (ja) | 2013-12-05 |
US8822841B2 (en) | 2014-09-02 |
JP5628975B2 (ja) | 2014-11-19 |
TW201244035A (en) | 2012-11-01 |
US20120267285A1 (en) | 2012-10-25 |
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