JP5097792B2 - 円筒型キャパシタを備えたウェーハレベルパッケージ及びその製造方法 - Google Patents
円筒型キャパシタを備えたウェーハレベルパッケージ及びその製造方法 Download PDFInfo
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- JP5097792B2 JP5097792B2 JP2010095358A JP2010095358A JP5097792B2 JP 5097792 B2 JP5097792 B2 JP 5097792B2 JP 2010095358 A JP2010095358 A JP 2010095358A JP 2010095358 A JP2010095358 A JP 2010095358A JP 5097792 B2 JP5097792 B2 JP 5097792B2
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- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
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- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- Engineering & Computer Science (AREA)
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- Computer Hardware Design (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
104 ボンディングパッド
106 絶縁層
108 再配線層
108a 内部電極部
108b 外部電極部
108c ポスト部
110 感光性レジスト
111 外周配線層
112a、112b、112c 開口部
114a 内部電極
114b 外部電極
114c メタルポスト
116 誘電体層
118 樹脂封止部
120a、120b オープン部
Claims (7)
- 上面にボンディングパッドを備え、前記ボンディングパッドを露出させる絶縁層が形成されたウェーハチップと、
前記ボンディングパッドに連結された状態で前記絶縁層の一側へ延長される再配線層と、
前記再配線層に連結されるように形成され、内部に中空部を有する円筒状の外部電極と、
前記中空部内に前記外部電極と分離されるように形成された円筒状の内部電極と、
前記外部電極と前記内部電極との間に形成される誘電体層と、
前記再配線層、前記内部電極、前記外部電極及び前記誘電体層をカバーするように前記絶縁層に形成され、前記内部電極の上面を露出させる第1オープン部を有する樹脂封止部とを含んでなることを特徴とする円筒型キャパシタを備えたウェーハレベルパッケージ。 - 前記再配線層が、
前記外部電極の下面に形成され、中空部を有する円形の外部電極部と、
前記内部電極の下面に前記外部電極部と分離されるように形成された円形の内部電極部とを含むことを特徴とする請求項1に記載の円筒型キャパシタを備えたウェーハレベルパッケージ。 - 前記再配線層が、前記絶縁層の他側に延長されてその上部にメタルポストを備え、前記樹脂封止部が、前記メタルポストをカバーするように形成されるが、前記メタルポストの上面を露出させる第2オープン部を有することを特徴とする請求項1に記載の円筒型キャパシタを備えたウェーハレベルパッケージ。
- (A)上面にボンディングパッドを備え、前記ボンディングパッドを露出させる絶縁層が形成されたウェーハチップを準備する段階と、
(B)前記ボンディングパッドに連結された状態で前記絶縁層の一側に延長され、内部に中空部を有する円形の外部電極部、及び前記中空部内に前記外部電極部と分離されるように形成された円形の内部電極部を有する再配線層を形成する段階と、
(C)前記内部電極部及び前記外部電極部の上部に内部電極及び外部電極を形成し、前記内部電極と前記外部電極との間に誘電体層を形成する段階と、
(D)前記再配線層、前記内部電極、前記外部電極及び前記誘電体層をカバーするように前記絶縁層に樹脂封止部を形成し、前記樹脂封止部には前記内部電極の上面を露出させる第1オープン部を加工する段階とを含むことを特徴とする円筒型キャパシタを備えたウェーハレベルパッケージの製造方法。 - 前記(C)段階が、
(C1)前記絶縁層の上部に感光性レジストを塗布する段階と、
(C2)前記感光性レジストに、前記内部電極部及び前記外部電極部をそれぞれ露出させる第1開口部及び第2開口部を形成する段階と、
(C3)前記第1開口部及び前記第2開口部にメッキ工程を施し、内部電極及び外部電極を形成する段階と、
(C4)前記感光性レジストを除去する段階と、
(C5)前記内部電極と前記外部電極との間に誘電材料を充填し、前記誘電材料をアニーリングして誘電体層を形成する段階とを含むことを特徴とする請求項4に記載の円筒型キャパシタを備えたウェーハレベルパッケージの製造方法。 - 前記(C5)段階において、前記誘電材料が、スクリーンプリント工程によって充填されることを特徴とする請求項5に記載の円筒型キャパシタを備えたウェーハレベルパッケージの製造方法。
- 前記(B)段階において、前記再配線層が、前記ボンディングパッドに連結された状態で前記絶縁層の一側及び他側に延長されるように形成され、
前記(C)段階において、前記絶縁層の他側に延長された前記再配線層の上部にメタルポストが形成され、
前記(D)段階において、前記樹脂封止部が、前記メタルポストをカバーするように形成され、前記樹脂封止部には前記メタルポストの上面を露出させる第2オープン部が加工されることを特徴とする請求項4に記載の円筒型キャパシタを備えたウェーハレベルパッケージの製造方法。
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20090075760 | 2009-08-17 | ||
KR10-2009-0075760 | 2009-08-17 | ||
KR10-2010-0003866 | 2010-01-15 | ||
KR1020100003866A KR101067133B1 (ko) | 2009-08-17 | 2010-01-15 | 원통형 캐패시터를 구비한 웨이퍼 레벨 패키지 및 그 제조방법 |
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JP2011286286A Division JP5209110B2 (ja) | 2009-08-17 | 2011-12-27 | 円筒型キャパシタを備えたウェーハレベルパッケージ及びその製造方法 |
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JP2011040713A JP2011040713A (ja) | 2011-02-24 |
JP5097792B2 true JP5097792B2 (ja) | 2012-12-12 |
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Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102009029114B4 (de) * | 2009-09-02 | 2017-06-01 | Robert Bosch Gmbh | Mikromechanisches System |
US20110291264A1 (en) | 2010-06-01 | 2011-12-01 | Daesik Choi | Integrated circuit packaging system with posts and method of manufacture thereof |
JP5603191B2 (ja) * | 2010-09-28 | 2014-10-08 | 株式会社テラプローブ | 半導体装置の製造方法 |
KR101167805B1 (ko) * | 2011-04-25 | 2012-07-25 | 삼성전기주식회사 | 패키지 기판 및 이의 제조방법 |
CN103959463B (zh) * | 2011-10-01 | 2017-03-15 | 英特尔公司 | 片上电容器及其组装方法 |
US8729714B1 (en) * | 2012-12-31 | 2014-05-20 | Intel Mobile Communications GmbH | Flip-chip wafer level package and methods thereof |
US9917196B1 (en) * | 2016-10-14 | 2018-03-13 | International Business Machines Corporation | Semiconductor device and method of forming the semiconductor device |
MY202342A (en) * | 2017-06-08 | 2024-04-24 | Intel Corp | Over-molded ic package with in-mold capacitor |
WO2023163742A1 (en) * | 2022-02-24 | 2023-08-31 | Microchip Technology Incorporated | Metal-insulator-metal (mim) capacitor module with outer electrode extension |
EP4283693A1 (en) * | 2022-05-27 | 2023-11-29 | Melexis Technologies NV | Trench capacitors |
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JP2000188448A (ja) * | 1998-12-22 | 2000-07-04 | Sony Corp | 配線基板及びその製造方法 |
JP4367070B2 (ja) * | 2003-09-29 | 2009-11-18 | カシオ計算機株式会社 | 半導体装置及びその製造方法 |
JP2006019455A (ja) * | 2004-06-30 | 2006-01-19 | Nec Electronics Corp | 半導体装置およびその製造方法 |
WO2008139393A1 (en) * | 2007-05-10 | 2008-11-20 | Nxp B.V. | Integration substrate with a ultra-high-density capacitor and a through-substrate via |
US20090267183A1 (en) * | 2008-04-28 | 2009-10-29 | Research Triangle Institute | Through-substrate power-conducting via with embedded capacitance |
US7821108B2 (en) * | 2008-07-04 | 2010-10-26 | Micron Technology, Inc. | Systems and methods for lowering interconnect capacitance through adjustment of relative signal levels |
TWI338357B (en) * | 2008-07-17 | 2011-03-01 | Unimicron Technology Corp | Chip package carrier and manufacturing method thereof |
TWI400731B (zh) * | 2008-08-29 | 2013-07-01 | Ind Tech Res Inst | 電容元件及其製造方法 |
US8107254B2 (en) * | 2008-11-20 | 2012-01-31 | International Business Machines Corporation | Integrating capacitors into vias of printed circuit boards |
US7989270B2 (en) * | 2009-03-13 | 2011-08-02 | Stats Chippac, Ltd. | Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors |
US8693163B2 (en) * | 2010-09-01 | 2014-04-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Cylindrical embedded capacitors |
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- 2010-04-16 JP JP2010095358A patent/JP5097792B2/ja not_active Expired - Fee Related
- 2010-04-29 US US12/770,614 patent/US8378452B2/en not_active Expired - Fee Related
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Publication number | Publication date |
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JP2011040713A (ja) | 2011-02-24 |
US20130147014A1 (en) | 2013-06-13 |
US20110037145A1 (en) | 2011-02-17 |
US9153641B2 (en) | 2015-10-06 |
US8378452B2 (en) | 2013-02-19 |
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