JP5484741B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5484741B2 JP5484741B2 JP2009012610A JP2009012610A JP5484741B2 JP 5484741 B2 JP5484741 B2 JP 5484741B2 JP 2009012610 A JP2009012610 A JP 2009012610A JP 2009012610 A JP2009012610 A JP 2009012610A JP 5484741 B2 JP5484741 B2 JP 5484741B2
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- JP
- Japan
- Prior art keywords
- semiconductor
- semiconductor region
- region
- depth
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
- H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
- H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/109—Reduced surface field [RESURF] PN junction structures
- H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009012610A JP5484741B2 (ja) | 2009-01-23 | 2009-01-23 | 半導体装置 |
| CN2010100040231A CN101794816B (zh) | 2009-01-23 | 2010-01-14 | 半导体器件 |
| US12/692,527 US8159023B2 (en) | 2009-01-23 | 2010-01-22 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009012610A JP5484741B2 (ja) | 2009-01-23 | 2009-01-23 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010171221A JP2010171221A (ja) | 2010-08-05 |
| JP2010171221A5 JP2010171221A5 (https=) | 2013-03-28 |
| JP5484741B2 true JP5484741B2 (ja) | 2014-05-07 |
Family
ID=42353476
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009012610A Active JP5484741B2 (ja) | 2009-01-23 | 2009-01-23 | 半導体装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8159023B2 (https=) |
| JP (1) | JP5484741B2 (https=) |
| CN (1) | CN101794816B (https=) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5739813B2 (ja) * | 2009-09-15 | 2015-06-24 | 株式会社東芝 | 半導体装置 |
| JP2011204796A (ja) * | 2010-03-24 | 2011-10-13 | Toshiba Corp | 半導体装置およびその製造方法 |
| KR101216897B1 (ko) | 2011-08-09 | 2012-12-28 | 주식회사 케이이씨 | 고전압 반도체 소자 |
| KR101279222B1 (ko) | 2011-08-26 | 2013-06-26 | 주식회사 케이이씨 | 고전압 반도체 소자 |
| US9287371B2 (en) | 2012-10-05 | 2016-03-15 | Semiconductor Components Industries, Llc | Semiconductor device having localized charge balance structure and method |
| US9219138B2 (en) | 2012-10-05 | 2015-12-22 | Semiconductor Components Industries, Llc | Semiconductor device having localized charge balance structure and method |
| US10256325B2 (en) * | 2012-11-08 | 2019-04-09 | Infineon Technologies Austria Ag | Radiation-hardened power semiconductor devices and methods of forming them |
| CN103199104B (zh) * | 2013-03-05 | 2016-04-27 | 矽力杰半导体技术(杭州)有限公司 | 一种晶圆结构以及应用其的功率器件 |
| SE1550821A1 (sv) * | 2015-06-16 | 2016-11-22 | Ascatron Ab | SiC SUPER-JUNCTIONS |
| US9768247B1 (en) | 2016-05-06 | 2017-09-19 | Semiconductor Components Industries, Llc | Semiconductor device having improved superjunction trench structure and method of manufacture |
| JP6254301B1 (ja) * | 2016-09-02 | 2017-12-27 | 新電元工業株式会社 | Mosfet及び電力変換回路 |
| US10700191B2 (en) | 2016-09-16 | 2020-06-30 | Shindengen Electric Manufacturing Co., Ltd. | MOSFET and power conversion circuit |
| WO2018087896A1 (ja) * | 2016-11-11 | 2018-05-17 | 新電元工業株式会社 | Mosfet及び電力変換回路 |
| WO2018216222A1 (ja) * | 2017-05-26 | 2018-11-29 | 新電元工業株式会社 | Mosfet及び電力変換回路 |
| JP2019054169A (ja) * | 2017-09-15 | 2019-04-04 | 株式会社東芝 | 半導体装置 |
| US11005354B2 (en) * | 2017-11-17 | 2021-05-11 | Shindengen Electric Manufacturing Co., Ltd. | Power conversion circuit |
| CN110416285B (zh) * | 2019-07-31 | 2024-06-07 | 电子科技大学 | 一种超结功率dmos器件 |
| JP7807731B2 (ja) * | 2022-03-22 | 2026-01-28 | 国立研究開発法人産業技術総合研究所 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69838453D1 (de) * | 1998-12-09 | 2007-10-31 | St Microelectronics Srl | Leistungsbauelement mit MOS-Gate für hohe Spannungen und diesbezügliches Herstellungsverfahren |
| EP1011146B1 (en) * | 1998-12-09 | 2006-03-08 | STMicroelectronics S.r.l. | Method of manufacturing an integrated edge structure for high voltage semiconductor devices |
| JP3743395B2 (ja) | 2002-06-03 | 2006-02-08 | 株式会社デンソー | 半導体装置の製造方法及び半導体装置 |
| JP4304433B2 (ja) * | 2002-06-14 | 2009-07-29 | 富士電機デバイステクノロジー株式会社 | 半導体素子 |
| JP3634830B2 (ja) * | 2002-09-25 | 2005-03-30 | 株式会社東芝 | 電力用半導体素子 |
| JP4904673B2 (ja) * | 2004-02-09 | 2012-03-28 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
| JP4851738B2 (ja) | 2005-06-29 | 2012-01-11 | 新電元工業株式会社 | 半導体装置 |
| WO2007122646A1 (en) | 2006-04-21 | 2007-11-01 | Stmicroelectronics S.R.L. | Process for manufacturing a power semiconductor device and corresponding power semiconductor device |
| EP1873837B1 (en) * | 2006-06-28 | 2013-03-27 | STMicroelectronics Srl | Semiconductor power device having an edge-termination structure and manufacturing method thereof |
| JP2008153620A (ja) * | 2006-11-21 | 2008-07-03 | Toshiba Corp | 半導体装置 |
| JP2008210899A (ja) * | 2007-02-23 | 2008-09-11 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP4564509B2 (ja) * | 2007-04-05 | 2010-10-20 | 株式会社東芝 | 電力用半導体素子 |
| JP2008294028A (ja) * | 2007-05-22 | 2008-12-04 | Toshiba Corp | 半導体装置 |
-
2009
- 2009-01-23 JP JP2009012610A patent/JP5484741B2/ja active Active
-
2010
- 2010-01-14 CN CN2010100040231A patent/CN101794816B/zh active Active
- 2010-01-22 US US12/692,527 patent/US8159023B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010171221A (ja) | 2010-08-05 |
| CN101794816B (zh) | 2012-10-10 |
| CN101794816A (zh) | 2010-08-04 |
| US20100187604A1 (en) | 2010-07-29 |
| US8159023B2 (en) | 2012-04-17 |
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