JP5739813B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 49
- 239000012535 impurity Substances 0.000 claims description 29
- 230000004888 barrier function Effects 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 23
- 229910052751 metal Inorganic materials 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 22
- 239000000463 material Substances 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 7
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 100
- 230000015556 catabolic process Effects 0.000 description 18
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 17
- 229910010271 silicon carbide Inorganic materials 0.000 description 17
- 238000005036 potential barrier Methods 0.000 description 13
- 230000005684 electric field Effects 0.000 description 9
- 230000000630 rising effect Effects 0.000 description 8
- 230000006866 deterioration Effects 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- -1 aluminum ions Chemical class 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 230000005641 tunneling Effects 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 239000012300 argon atmosphere Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000011859 microparticle Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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Description
本発明に係る半導体装置が具備する主要な部分及び領域は、第1の実施形態においては、次のようになる。すなわち、本実施形態の半導体装置は、素材としてSiCを使用して形成したMOSFETとショットキーバリアダイオードからなる単位セルとして、これら複数の単位セルからなる半導体装置である。さらに第1の導電型の半導体基板とはn型SiC基板であり、前記の半導体基板よりもより低濃度の第1の導電型の半導体堆積層とはSiCからなりn型不純物を含むn型ドリフト層である。また、第2の導電型のウェル領域とはp型ウェル領域である。またトレンチ型ソース電極の側面と接する第1導電型の第1ソース領域とは、n型不純物濃度が高いn+ソース領域であり、第2の導電型の第2ソース領域とはさらにp型不純物濃度をさらに高濃度にドーピングしてp型となっているp+ソース領域をいうものとする。また、JFET領域とは、p型ウェルの間又はp型ウェルの内側にあるn型不純物を含むn型ドリフト層の一部である。JFET領域は、ゲート電圧印加によりp型ウェル領域表面に形成されるチャネル領域に隣接する領域を指し、n+ソース領域からチャネルを通ってこのJFET領域、n型ドリフト層、n型SiC基板、さらにドレイン電極へと流れる電子の導電パスの一部を構成する領域をいう。
実施形態2では、p型ウェルの内部にショットキー界面9を有するSBDの逆方向の耐圧をさらに上昇させるため、トレンチ型ソース電極3に接触してショットキー接合9を形成するn型ドリフト層の表面に予めp型不純物をドーピングしてp型層をショットキー界面9とn型ドリフト層8の間に設けたものである。具体的には、n型ドリフト層8のn型不純物濃度を5×1015/cm3 とした時、ショットキー界面9直下のp型層16の厚さを200nm程度、p型不純物濃度を1×1016/cm程度とすることにより、熱平衡状態においてp型層16の全領域を空乏化することができる。図8(a)は、トレンチ型ソース電極3に接触してショットキー接合9を形成するn型ドリフト層6の表面に予めp型不純物をドーピングして薄いp型層をショットキー接合界面9とn型ドリフト層8との間に設けた本発明の本実施形態に係る半導体装置のショットキー接合界面の断面の一部分を示す図である。図8(b)は、図8(a)に示したダイオードの熱平衡状態におけるエネルギーバンド構造を示すバンドダイヤグラムである。図8(b)に示すように、熱平衡状態のとき、フェルミレベルは一定であるから、n型ドリフト層8とp型層16とのPN接合界面17付近にはポテンシャルの勾配がある領域(遷移領域)が形成され、この遷移領域においてn型ドリフト層8およびp型層16には、キャリアが存在しない空乏層が形成される。すなわち、PN接合界面17付近のポテンシャルの勾配と、ショットキー接合界面9付近のポテンシャルの勾配により、p型層16を中心とした領域に、n型ドリフト層8の電子から見たポテンシャルの障壁(ポテンシャルバリア)が形成される。電子から見たポテンシャルバリアの高さ(VBH)22は、n型ドリフト層8とp型層16間のビルトイン・ポテンシャルよりも低く抑えることができる。なお、n型ドリフト層8とp型層16間のビルトイン・ポテンシャルとは、n型ドリフト層8とp型層16とのPN接合を形成し、p型層16とショットキー金属電極3とのショットキー接合を形成しない場合におけるn型ドリフト層8とp型層16間のポテンシャルの差を示す。これは、ショットキー接合9によるp型層16のポテンシャル勾配により、ポテンシャル障壁の高さ(VBH)22が、n型ドリフト層8とp型層16間のビルトイン・ポテンシャルよりも低く押さえ込まれた為である。また、p型層16のp型不純物濃度と厚さを制御することにより、ポテンシャル障壁の高さ(VBH)22を、ショットキー接合界面9のバリアハイト(φBn)からPN接合のビルトイン・ポテンシャルの間で自由に設定できる。
図9は、第3の実施形態に係る半導体装置のSBD内蔵のMOSFETの平面図である。p型ウェル領域10を最密充填が可能な六角形とし、その内側にp型ウェル領域10と相似形のn+ソース領域6とp+ソース領域7が形成され、p+ソース領域7はトレンチ型ソース電極3から面内方向に放射状に形成されている。本実施形態では、トレンチ型ソース電極3はp型ウェル10内の中心部にやはり六角形に形成されている。ここでゲート電極1は図中の四角形の枠内の位置にゲート絶縁膜を介して形成される。ゲート絶縁膜は図示されていない。なおチャネル領域12及びJFET領域13はゲート電極1の下にあり、ゲート電極1に閾値以上の電圧を印加したとき、n+ソース6から流れ出た電子は、チャネル領域12を通り、JFET領域13に至って、紙面に垂直に下方へ移動し、図示しないドレイン電極へ達する。本実施形態の形状的特徴からトレンチ型ソース電極3の位置が多少ずれても、MOSFET及びSBDの特性に大きく影響を及ぼすことが無いことが予想できるため、よりロバストな設計が可能となる。
2・・・ ゲート絶縁膜
3・・・ トレンチ型ソース電極
4・・・ ドレイン電極
5・・・ n型SiC基板
6・・・ n+ソース領域
7・・・ p+ソース領域
8・・・ n型ドリフト層
9・・・ ショットキー接合部(ショットキー接合界面)
10・・・ p型ウェル
11・・・ トレンチ(溝)
12・・・ チャネル領域
13・・・ JFET領域
14・・・ トレンチ(溝)の底部
15・・・ ショットキーバリアダイオード
16・・・ p型層
17・・・ PN接合界面
18・・・ 第1空乏層
19・・・ 第2空乏層
20・・・ フェルミレベル
21・・・ ショットキーバリアハイトφBN
22・・・ ポテンシャルバリアVBH
23・・・ 単位セル
31・・・ ショットキー金属層
Claims (7)
- 第1導電型の半導体基板上に設けられ、前記半導体基板よりも低不純物濃度の第1導電型の半導体堆積層と、
前記半導体堆積層の表面に略垂直に離間配置される深さが同一の第1及び第2トレンチをそれぞれ取り囲むように設けられ、前記半導体堆積層の表面に前記第1及び第2トレンチよりも深く、正六角形形状を有し、一辺が相対向するように並列配置される深さが同一の第2導電型の第1及び第2ウエル領域と、
前記第1ウエル領域と前記第2ウエル領域の間の前記半導体堆積層上に、ゲート絶縁膜を介して、前記第1ウエル領域と前記第2ウエル領域をオーバーラップするように設けられるゲート電極と、
前記第1及び第2ウエル領域の表面にそれぞれ設けられ、前記第1及び第2トレンチよりも浅く、前記第1及び第2トレンチをそれぞれ取り囲むように、前記半導体基板と平行な面内に交互に繰り返し配置される、前記半導体堆積層よりも高不純物濃度の第1導電型の第1ソース領域及び前記第1及び第2ウエル領域よりも高不純物濃度の第2導電型の第2ソース領域と、
前記第1及び第2トレンチをそれぞれ覆うように埋設される第1及び第2トレンチ型ソース電極と、
前記半導体基板の裏面に設けられるドレイン電極と、
を具備し、
前記第1及び第2トレンチそれぞれの側面で、前記第1及び第2トレンチ型ソース電極が前記交互に繰り返し配置された前記第1ソース領域と前記第2ソース領域の双方と接し、
前記第1トレンチの底部の前記半導体堆積層は前記第1トレンチ型ソース電極との間にショットキー接合を形成し、前記第2トレンチの底部の前記半導体堆積層は前記第2トレンチ型ソース電極との間にショットキー接合を形成する
ことを特徴とする半導体装置。 - 前記第1及び第2トレンチは、それぞれ正六角形形状を有し、一辺が前記第1及び第2ウエル領域の一辺とそれぞれ並列配置される
ことを特徴とする請求項1に記載の半導体装置。 - 前記第2ソース領域は、正六角形の前記第1及び第2トレンチの角にそれぞれ接するように配置され、正六角形の前記第1及び第2トレンチの角からそれぞれ放射状に配置される
ことを特徴とする請求項2に記載の半導体装置。 - 前記第1及び第2トレンチ直下の前記半導体堆積層表面にそれぞれ設けられ、前記第1及び第2ウエル領域の側面にそれぞれ接し、熱平衡状態において全領域が空乏化される第2導電型の半導体層を有する
ことを特徴とする請求項1乃至3のいずれか1項に記載の半導体装置。 - 前記第1トレンチの底部と前記第1トレンチ型ソース電極の間、前記第2トレンチの底部と前記第2トレンチ型ソース電極の間にそれぞれ設けられ、前記第1及び第2トレンチ型ソース電極よりも仕事関数の大きなショットキー金属層を有する
ことを特徴とする請求項1乃至3のいずれか1項に記載の半導体装置。 - 前記第1及び第2トレンチ型ソース電極は、Ni単体、NiとAlの混在材料、或いは多結晶シリコンである
ことを特徴とする請求項5に記載の半導体装置。 - 前記半導体装置は、ショットキーバリアダイオード(SBD)を内蔵したSiC縦型MOSFETである
ことを特徴とする請求項1乃至6のいずれか1項に記載の半導体装置。
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US20120223339A1 (en) | 2012-09-06 |
US9041173B2 (en) | 2015-05-26 |
WO2011033550A1 (ja) | 2011-03-24 |
JPWO2011033550A1 (ja) | 2013-02-07 |
US8835934B2 (en) | 2014-09-16 |
US20140306239A1 (en) | 2014-10-16 |
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