JP5478916B2 - Soi基板の作製方法 - Google Patents

Soi基板の作製方法 Download PDF

Info

Publication number
JP5478916B2
JP5478916B2 JP2009049196A JP2009049196A JP5478916B2 JP 5478916 B2 JP5478916 B2 JP 5478916B2 JP 2009049196 A JP2009049196 A JP 2009049196A JP 2009049196 A JP2009049196 A JP 2009049196A JP 5478916 B2 JP5478916 B2 JP 5478916B2
Authority
JP
Japan
Prior art keywords
layer
substrate
base substrate
semiconductor
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009049196A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009246346A5 (https=
JP2009246346A (ja
Inventor
明久 下村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2009049196A priority Critical patent/JP5478916B2/ja
Publication of JP2009246346A publication Critical patent/JP2009246346A/ja
Publication of JP2009246346A5 publication Critical patent/JP2009246346A5/ja
Application granted granted Critical
Publication of JP5478916B2 publication Critical patent/JP5478916B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
  • Drying Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Thin Film Transistor (AREA)
JP2009049196A 2008-03-14 2009-03-03 Soi基板の作製方法 Expired - Fee Related JP5478916B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009049196A JP5478916B2 (ja) 2008-03-14 2009-03-03 Soi基板の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008066165 2008-03-14
JP2008066165 2008-03-14
JP2009049196A JP5478916B2 (ja) 2008-03-14 2009-03-03 Soi基板の作製方法

Publications (3)

Publication Number Publication Date
JP2009246346A JP2009246346A (ja) 2009-10-22
JP2009246346A5 JP2009246346A5 (https=) 2012-04-19
JP5478916B2 true JP5478916B2 (ja) 2014-04-23

Family

ID=41307875

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009049196A Expired - Fee Related JP5478916B2 (ja) 2008-03-14 2009-03-03 Soi基板の作製方法

Country Status (1)

Country Link
JP (1) JP5478916B2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013002227A1 (ja) 2011-06-30 2013-01-03 シャープ株式会社 半導体基板の製造方法、半導体基板作成用基板、積層基板、半導体基板、及び電子デバイス
US9614021B2 (en) * 2013-07-24 2017-04-04 Samsung Display Co., Ltd. Organic light-emitting display apparatus and manufacturing method thereof

Also Published As

Publication number Publication date
JP2009246346A (ja) 2009-10-22

Similar Documents

Publication Publication Date Title
JP5542256B2 (ja) Soi基板の作製方法
JP5383098B2 (ja) 半導体装置の作製方法
KR101561855B1 (ko) Soi기판의 제작방법
JP5478789B2 (ja) Soi基板の作製方法
JP5354900B2 (ja) 半導体基板の作製方法
JP5732119B2 (ja) 半導体装置の作製方法
JP5478166B2 (ja) 半導体装置の作製方法
JP2010050446A (ja) Soi基板の作製方法
JP2010034523A (ja) Soi基板の作製方法
JP5666794B2 (ja) Soi基板の作製方法
JP5386193B2 (ja) Soi基板の作製方法
US8420504B2 (en) Method for manufacturing semiconductor device
JP5478199B2 (ja) 半導体装置の作製方法
JP5478916B2 (ja) Soi基板の作製方法
JP5618521B2 (ja) 半導体装置の作製方法
JP5201967B2 (ja) 半導体基板の作製方法および半導体装置の作製方法
JP2010177662A (ja) Soi基板の作製方法及び半導体装置の作製方法
JP5430109B2 (ja) Soi基板の作製方法
US20090223628A1 (en) Manufacturing apparatus of composite substrate and manufacturing method of composite substrate with use of the manufacturing apparatus
JP5438945B2 (ja) ボンド基板の作製方法
JP2010147313A (ja) Soi基板の作製方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120301

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120301

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20131129

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131203

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140108

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140128

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140212

R150 Certificate of patent or registration of utility model

Ref document number: 5478916

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees