JP5436963B2 - 配線基板及び半導体装置 - Google Patents
配線基板及び半導体装置 Download PDFInfo
- Publication number
- JP5436963B2 JP5436963B2 JP2009170469A JP2009170469A JP5436963B2 JP 5436963 B2 JP5436963 B2 JP 5436963B2 JP 2009170469 A JP2009170469 A JP 2009170469A JP 2009170469 A JP2009170469 A JP 2009170469A JP 5436963 B2 JP5436963 B2 JP 5436963B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- power supply
- ground
- layer
- core substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0224—Patterned shielding planes, ground planes or power planes
- H05K1/0227—Split or nearly split shielding or ground planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
- H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
- H10W70/687—Shapes or dispositions thereof comprising multiple insulating layers characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors incorporating printed capacitors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/093—Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/09309—Core having two or more power planes; Capacitive laminate of two power planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/09345—Power and ground in the same plane; Power planes for two voltages in one plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009170469A JP5436963B2 (ja) | 2009-07-21 | 2009-07-21 | 配線基板及び半導体装置 |
| US12/813,692 US8242612B2 (en) | 2009-07-21 | 2010-06-11 | Wiring board having piercing linear conductors and semiconductor device using the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009170469A JP5436963B2 (ja) | 2009-07-21 | 2009-07-21 | 配線基板及び半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011029236A JP2011029236A (ja) | 2011-02-10 |
| JP2011029236A5 JP2011029236A5 (enExample) | 2012-08-16 |
| JP5436963B2 true JP5436963B2 (ja) | 2014-03-05 |
Family
ID=43496560
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009170469A Expired - Fee Related JP5436963B2 (ja) | 2009-07-21 | 2009-07-21 | 配線基板及び半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8242612B2 (enExample) |
| JP (1) | JP5436963B2 (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8415781B2 (en) * | 2010-08-09 | 2013-04-09 | Ibiden Co., Ltd. | Electronic component and method for manufacturing the same |
| US9293405B2 (en) * | 2011-03-22 | 2016-03-22 | Renesas Electronics Corporation | Semiconductor device |
| JP5775789B2 (ja) * | 2011-10-18 | 2015-09-09 | 新光電気工業株式会社 | 積層型半導体パッケージ |
| US8890273B2 (en) * | 2012-01-31 | 2014-11-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for an improved reflectivity optical grid for image sensors |
| JP6282425B2 (ja) * | 2012-10-29 | 2018-02-21 | 新光電気工業株式会社 | 配線基板の製造方法 |
| JP2014192176A (ja) * | 2013-03-26 | 2014-10-06 | Ngk Spark Plug Co Ltd | 配線基板 |
| US9373576B2 (en) | 2014-01-09 | 2016-06-21 | Broadcom Corporation | Flip chip pad geometry for an IC package substrate |
| TW201539596A (zh) * | 2014-04-09 | 2015-10-16 | 同欣電子工業股份有限公司 | 中介體及其製造方法 |
| US9699921B2 (en) * | 2014-08-01 | 2017-07-04 | Fujikura Ltd. | Multi-layer wiring board |
| US9960120B2 (en) * | 2015-03-31 | 2018-05-01 | Shinko Electric Industries Co., Ltd. | Wiring substrate with buried substrate having linear conductors |
| JP6600573B2 (ja) * | 2015-03-31 | 2019-10-30 | 新光電気工業株式会社 | 配線基板及び半導体パッケージ |
| JP2016106427A (ja) * | 2016-03-03 | 2016-06-16 | 京セラサーキットソリューションズ株式会社 | 配線基板の製造方法および実装構造体の製造方法 |
| CN109524360B (zh) * | 2017-09-20 | 2020-06-26 | 永恒光实业股份有限公司 | 挠性衬底结构及其制造方法 |
| JP2019197423A (ja) * | 2018-05-10 | 2019-11-14 | シャープ株式会社 | 基板の製造方法及び表示装置の製造方法 |
| JP7279538B2 (ja) * | 2019-06-19 | 2023-05-23 | 富士フイルムビジネスイノベーション株式会社 | 発光装置 |
| WO2021193092A1 (ja) * | 2020-03-25 | 2021-09-30 | 京セラ株式会社 | 配線基板 |
| CN118366875A (zh) | 2021-01-26 | 2024-07-19 | 长江存储科技有限责任公司 | 基板结构及其制造和封装方法 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4463084A (en) | 1982-02-09 | 1984-07-31 | Alps Electric Co., Ltd. | Method of fabricating a circuit board and circuit board provided thereby |
| JPS58141595A (ja) | 1982-02-17 | 1983-08-22 | アルプス電気株式会社 | 回路板の形成方法 |
| JPS58137915A (ja) | 1982-02-09 | 1983-08-16 | アルプス電気株式会社 | 回路板の形成方法 |
| JPH10308565A (ja) | 1997-05-02 | 1998-11-17 | Shinko Electric Ind Co Ltd | 配線基板 |
| JP2000031652A (ja) * | 1998-07-15 | 2000-01-28 | Nec Corp | 多層プリント配線板 |
| JP2004273480A (ja) * | 2003-03-05 | 2004-09-30 | Sony Corp | 配線基板およびその製造方法および半導体装置 |
| WO2005107350A1 (ja) * | 2004-04-28 | 2005-11-10 | Ibiden Co., Ltd. | 多層プリント配線板 |
| JP2005327932A (ja) * | 2004-05-14 | 2005-11-24 | Shinko Electric Ind Co Ltd | 多層配線基板及びその製造方法 |
| JP4649198B2 (ja) * | 2004-12-20 | 2011-03-09 | 新光電気工業株式会社 | 配線基板の製造方法 |
| EP1833286A1 (en) * | 2004-12-28 | 2007-09-12 | Ngk Spark Plug Co., Ltd | Wiring board and wiring board manufacturing method |
| JP4357577B2 (ja) | 2007-06-14 | 2009-11-04 | 太陽誘電株式会社 | コンデンサ及びその製造方法 |
| JP5344667B2 (ja) | 2007-12-18 | 2013-11-20 | 太陽誘電株式会社 | 回路基板およびその製造方法並びに回路モジュール |
| JP5385682B2 (ja) * | 2009-05-19 | 2014-01-08 | 新光電気工業株式会社 | 電子部品の実装構造 |
| JP5249132B2 (ja) * | 2009-06-03 | 2013-07-31 | 新光電気工業株式会社 | 配線基板 |
| JP5280309B2 (ja) * | 2009-07-17 | 2013-09-04 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| JP2011091185A (ja) * | 2009-10-22 | 2011-05-06 | Shinko Electric Ind Co Ltd | 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法 |
| JP2011151185A (ja) * | 2010-01-21 | 2011-08-04 | Shinko Electric Ind Co Ltd | 配線基板及び半導体装置 |
| JP5363384B2 (ja) * | 2010-03-11 | 2013-12-11 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
-
2009
- 2009-07-21 JP JP2009170469A patent/JP5436963B2/ja not_active Expired - Fee Related
-
2010
- 2010-06-11 US US12/813,692 patent/US8242612B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20110018144A1 (en) | 2011-01-27 |
| US8242612B2 (en) | 2012-08-14 |
| JP2011029236A (ja) | 2011-02-10 |
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| LAPS | Cancellation because of no payment of annual fees |