JP5391423B2 - 解像度以下のケイ素フィーチャおよびそれを形成するための方法 - Google Patents
解像度以下のケイ素フィーチャおよびそれを形成するための方法 Download PDFInfo
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- JP5391423B2 JP5391423B2 JP2009519450A JP2009519450A JP5391423B2 JP 5391423 B2 JP5391423 B2 JP 5391423B2 JP 2009519450 A JP2009519450 A JP 2009519450A JP 2009519450 A JP2009519450 A JP 2009519450A JP 5391423 B2 JP5391423 B2 JP 5391423B2
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- 238000000034 method Methods 0.000 title claims description 69
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title description 18
- 229910052710 silicon Inorganic materials 0.000 title description 18
- 239000010703 silicon Substances 0.000 title description 18
- 239000004065 semiconductor Substances 0.000 claims description 52
- 238000005530 etching Methods 0.000 claims description 40
- 230000008569 process Effects 0.000 claims description 37
- 239000011810 insulating material Substances 0.000 claims description 28
- 239000004020 conductor Substances 0.000 claims description 23
- 238000001312 dry etching Methods 0.000 claims description 12
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 9
- 229910052731 fluorine Inorganic materials 0.000 claims description 9
- 239000011737 fluorine Substances 0.000 claims description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 8
- 230000000873 masking effect Effects 0.000 claims description 8
- 239000001301 oxygen Substances 0.000 claims description 8
- 229910052760 oxygen Inorganic materials 0.000 claims description 8
- 239000003990 capacitor Substances 0.000 claims description 6
- 238000002955 isolation Methods 0.000 claims description 6
- 238000001459 lithography Methods 0.000 claims description 6
- 238000000206 photolithography Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 4
- 238000003860 storage Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 description 16
- 239000000758 substrate Substances 0.000 description 12
- 239000010410 layer Substances 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 229910052814 silicon oxide Inorganic materials 0.000 description 7
- 239000007789 gas Substances 0.000 description 6
- 210000004027 cell Anatomy 0.000 description 5
- 238000009413 insulation Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 238000003491 array Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical group O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 2
- 229910001882 dioxygen Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 210000000352 storage cell Anatomy 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004883 computer application Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- -1 silicon oxide Chemical compound 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
- H10B12/056—Making the transistor the transistor being a FinFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/36—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being a FinFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
- H10D30/6211—Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
- H10D30/6212—Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies having non-rectangular cross-sections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
- H10D30/6212—Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies having non-rectangular cross-sections
- H10D30/6213—Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies having non-rectangular cross-sections having rounded corners
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/486,800 | 2006-07-14 | ||
| US11/486,800 US7678648B2 (en) | 2006-07-14 | 2006-07-14 | Subresolution silicon features and methods for forming the same |
| PCT/US2007/015146 WO2008008204A1 (en) | 2006-07-14 | 2007-06-28 | Subresolution silicon features and methods for forming the same |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009544150A JP2009544150A (ja) | 2009-12-10 |
| JP2009544150A5 JP2009544150A5 (https=) | 2010-08-19 |
| JP5391423B2 true JP5391423B2 (ja) | 2014-01-15 |
Family
ID=38596072
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009519450A Expired - Fee Related JP5391423B2 (ja) | 2006-07-14 | 2007-06-28 | 解像度以下のケイ素フィーチャおよびそれを形成するための方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (3) | US7678648B2 (https=) |
| EP (1) | EP2041781A1 (https=) |
| JP (1) | JP5391423B2 (https=) |
| KR (1) | KR101403509B1 (https=) |
| CN (1) | CN101490821B (https=) |
| WO (1) | WO2008008204A1 (https=) |
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| KR101077302B1 (ko) * | 2009-04-10 | 2011-10-26 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
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| CN103811323B (zh) * | 2012-11-13 | 2016-05-25 | 中芯国际集成电路制造(上海)有限公司 | 鳍部的制作方法、鳍式场效应晶体管及其制作方法 |
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| US7396720B2 (en) * | 2004-07-27 | 2008-07-08 | Micron Technology, Inc. | High coupling memory cell |
| JP2006135067A (ja) * | 2004-11-05 | 2006-05-25 | Toshiba Corp | 半導体装置およびその製造方法 |
| US20060105578A1 (en) * | 2004-11-12 | 2006-05-18 | Shih-Ping Hong | High-selectivity etching process |
| US20070228425A1 (en) * | 2006-04-04 | 2007-10-04 | Miller Gayle W | Method and manufacturing low leakage MOSFETs and FinFETs |
| US7456068B2 (en) * | 2006-06-08 | 2008-11-25 | Intel Corporation | Forming ultra-shallow junctions |
| US7678648B2 (en) * | 2006-07-14 | 2010-03-16 | Micron Technology, Inc. | Subresolution silicon features and methods for forming the same |
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- 2007-06-28 JP JP2009519450A patent/JP5391423B2/ja not_active Expired - Fee Related
- 2007-06-28 WO PCT/US2007/015146 patent/WO2008008204A1/en not_active Ceased
- 2007-06-28 KR KR1020097003076A patent/KR101403509B1/ko not_active Expired - Fee Related
- 2007-06-28 EP EP07810048A patent/EP2041781A1/en not_active Withdrawn
- 2007-06-28 CN CN200780025866.6A patent/CN101490821B/zh not_active Expired - Fee Related
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Also Published As
| Publication number | Publication date |
|---|---|
| US8084845B2 (en) | 2011-12-27 |
| US8981444B2 (en) | 2015-03-17 |
| US20120061740A1 (en) | 2012-03-15 |
| WO2008008204A1 (en) | 2008-01-17 |
| US20080014699A1 (en) | 2008-01-17 |
| US7678648B2 (en) | 2010-03-16 |
| US20100148234A1 (en) | 2010-06-17 |
| KR101403509B1 (ko) | 2014-06-09 |
| CN101490821B (zh) | 2013-01-23 |
| JP2009544150A (ja) | 2009-12-10 |
| EP2041781A1 (en) | 2009-04-01 |
| CN101490821A (zh) | 2009-07-22 |
| KR20090039783A (ko) | 2009-04-22 |
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