JP5391423B2 - 解像度以下のケイ素フィーチャおよびそれを形成するための方法 - Google Patents

解像度以下のケイ素フィーチャおよびそれを形成するための方法 Download PDF

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JP5391423B2
JP5391423B2 JP2009519450A JP2009519450A JP5391423B2 JP 5391423 B2 JP5391423 B2 JP 5391423B2 JP 2009519450 A JP2009519450 A JP 2009519450A JP 2009519450 A JP2009519450 A JP 2009519450A JP 5391423 B2 JP5391423 B2 JP 5391423B2
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JP2009544150A5 (https=
JP2009544150A (ja
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ジェイ. トレック,ケヴィン
フィッシャー,マーク
ジェイ. ハンソン,ロバート
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ラウンド ロック リサーチ、エルエルシー
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor
    • H10B12/056Making the transistor the transistor being a FinFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/36DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being a FinFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • H10D30/6211Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • H10D30/6212Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies having non-rectangular cross-sections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • H10D30/6212Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies having non-rectangular cross-sections
    • H10D30/6213Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies having non-rectangular cross-sections having rounded corners

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
  • Semiconductor Memories (AREA)
  • Drying Of Semiconductors (AREA)
JP2009519450A 2006-07-14 2007-06-28 解像度以下のケイ素フィーチャおよびそれを形成するための方法 Expired - Fee Related JP5391423B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/486,800 2006-07-14
US11/486,800 US7678648B2 (en) 2006-07-14 2006-07-14 Subresolution silicon features and methods for forming the same
PCT/US2007/015146 WO2008008204A1 (en) 2006-07-14 2007-06-28 Subresolution silicon features and methods for forming the same

Publications (3)

Publication Number Publication Date
JP2009544150A JP2009544150A (ja) 2009-12-10
JP2009544150A5 JP2009544150A5 (https=) 2010-08-19
JP5391423B2 true JP5391423B2 (ja) 2014-01-15

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JP2009519450A Expired - Fee Related JP5391423B2 (ja) 2006-07-14 2007-06-28 解像度以下のケイ素フィーチャおよびそれを形成するための方法

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Country Link
US (3) US7678648B2 (https=)
EP (1) EP2041781A1 (https=)
JP (1) JP5391423B2 (https=)
KR (1) KR101403509B1 (https=)
CN (1) CN101490821B (https=)
WO (1) WO2008008204A1 (https=)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7678648B2 (en) * 2006-07-14 2010-03-16 Micron Technology, Inc. Subresolution silicon features and methods for forming the same
JP4552908B2 (ja) * 2006-07-26 2010-09-29 エルピーダメモリ株式会社 半導体装置の製造方法
KR101052872B1 (ko) * 2008-08-08 2011-07-29 주식회사 하이닉스반도체 반도체 소자 및 그의 제조방법
KR101077302B1 (ko) * 2009-04-10 2011-10-26 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US8211772B2 (en) * 2009-12-23 2012-07-03 Intel Corporation Two-dimensional condensation for uniaxially strained semiconductor fins
US8421139B2 (en) * 2010-04-07 2013-04-16 International Business Machines Corporation Structure and method to integrate embedded DRAM with finfet
WO2013052906A2 (en) 2011-10-05 2013-04-11 Coeur, Inc. Guidewire positioning tool
US9368502B2 (en) 2011-10-17 2016-06-14 GlogalFoundries, Inc. Replacement gate multigate transistor for embedded DRAM
US8476137B1 (en) * 2012-02-10 2013-07-02 Globalfoundries Inc. Methods of FinFET height control
KR101823105B1 (ko) * 2012-03-19 2018-01-30 삼성전자주식회사 전계 효과 트랜지스터의 형성 방법
US8629512B2 (en) 2012-03-28 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Gate stack of fin field effect transistor with slanted sidewalls
KR101908980B1 (ko) * 2012-04-23 2018-10-17 삼성전자주식회사 전계 효과 트랜지스터
US20130320453A1 (en) * 2012-06-01 2013-12-05 Abhijit Jayant Pethe Area scaling on trigate transistors
CN103515209B (zh) * 2012-06-19 2017-07-14 中芯国际集成电路制造(上海)有限公司 鳍式场效应管及其形成方法
CN103515282A (zh) * 2012-06-20 2014-01-15 中芯国际集成电路制造(上海)有限公司 一种鳍式场效应晶体管及其形成方法
US9583398B2 (en) 2012-06-29 2017-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit having FinFETS with different fin profiles
US8841185B2 (en) 2012-08-13 2014-09-23 International Business Machines Corporation High density bulk fin capacitor
US9006079B2 (en) * 2012-10-19 2015-04-14 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for forming semiconductor fins with reduced widths
KR101974350B1 (ko) * 2012-10-26 2019-05-02 삼성전자주식회사 활성 영역을 한정하는 라인 형 트렌치들을 갖는 반도체 소자 및 그 형성 방법
CN103811323B (zh) * 2012-11-13 2016-05-25 中芯国际集成电路制造(上海)有限公司 鳍部的制作方法、鳍式场效应晶体管及其制作方法
US9159832B2 (en) * 2013-03-08 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor fin structures and methods for forming the same
JP2014209515A (ja) * 2013-04-16 2014-11-06 東京エレクトロン株式会社 エッチング方法
US9064900B2 (en) * 2013-07-08 2015-06-23 Globalfoundries Inc. FinFET method comprising high-K dielectric
KR102073967B1 (ko) 2013-07-30 2020-03-02 삼성전자주식회사 전계 효과 트랜지스터를 포함하는 반도체 소자
CN104616992A (zh) * 2013-11-05 2015-05-13 中芯国际集成电路制造(上海)有限公司 FinFET器件的制作方法
US9343320B2 (en) 2013-12-06 2016-05-17 Globalfoundries Inc. Pattern factor dependency alleviation for eDRAM and logic devices with disposable fill to ease deep trench integration with fins
US9190496B2 (en) 2014-01-23 2015-11-17 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making a FinFET device
CN103996625B (zh) * 2014-06-12 2017-01-25 上海华力微电子有限公司 鳍结构的形成方法
CN105470295B (zh) * 2014-09-09 2020-06-30 联华电子股份有限公司 鳍状结构及其制造方法
CN105489494B (zh) 2014-10-09 2020-03-31 联华电子股份有限公司 半导体元件及其制作方法
US9349737B2 (en) * 2014-10-10 2016-05-24 Micron Technology, Inc. Passing access line structure in a memory device
US9583625B2 (en) 2014-10-24 2017-02-28 Globalfoundries Inc. Fin structures and multi-Vt scheme based on tapered fin and method to form
KR102262827B1 (ko) * 2014-12-30 2021-06-08 삼성전자주식회사 반도체 장치 및 그 제조 방법
KR102274750B1 (ko) 2015-01-27 2021-07-07 삼성전자주식회사 반도체 장치 제조 방법
KR102323943B1 (ko) 2015-10-21 2021-11-08 삼성전자주식회사 반도체 장치 제조 방법
US10068904B2 (en) * 2016-02-05 2018-09-04 Samsung Electronics Co., Ltd. Semiconductor device
KR20170097270A (ko) * 2016-02-17 2017-08-28 삼성전자주식회사 반도체 소자 및 이의 제조 방법
US9825036B2 (en) 2016-02-23 2017-11-21 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and method for semiconductor device
US9761590B1 (en) 2016-05-23 2017-09-12 Micron Technology, Inc. Passing access line structure in a memory device
US9754798B1 (en) * 2016-09-28 2017-09-05 International Business Machines Corporation Hybridization fin reveal for uniform fin reveal depth across different fin pitches
CN108573870B (zh) * 2017-03-07 2021-07-13 中芯国际集成电路制造(上海)有限公司 鳍式场效应管及其形成方法
CN108807383B (zh) * 2017-04-28 2021-01-26 联华电子股份有限公司 半导体元件及其制作方法
US10461194B2 (en) 2018-03-23 2019-10-29 International Business Machines Corporation Threshold voltage control using channel digital etch
US20230197826A1 (en) * 2021-12-21 2023-06-22 Christine RADLINGER Self-aligned gate endcap (sage) architectures with improved cap
US20240178320A1 (en) * 2022-11-24 2024-05-30 Invention And Collaboration Laboratory Pte., Ltd. Semiconductor transistor with precise geometries and related manufacture method thereof

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5757813A (en) * 1995-10-18 1998-05-26 Telefonaktiebolaget Lm Ericsson Method for achieving optimal channel coding in a communication system
DE19654256A1 (de) * 1996-12-23 1998-06-25 Biedermann Motech Gmbh Wirbelsäulenorthese
JP3583583B2 (ja) * 1997-07-08 2004-11-04 株式会社東芝 半導体装置及びその製造方法
JP4237344B2 (ja) * 1998-09-29 2009-03-11 株式会社東芝 半導体装置及びその製造方法
JP3785003B2 (ja) * 1999-09-20 2006-06-14 株式会社東芝 不揮発性半導体記憶装置の製造方法
JP2001168306A (ja) * 1999-12-09 2001-06-22 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
US20020011612A1 (en) 2000-07-31 2002-01-31 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
US6544655B1 (en) * 2000-08-08 2003-04-08 Honeywell International Inc. Methods for reducing the curvature in boron-doped silicon micromachined structures
KR100338783B1 (en) * 2000-10-28 2002-06-01 Samsung Electronics Co Ltd Semiconductor device having expanded effective width of active region and fabricating method thereof
US6472258B1 (en) 2000-11-13 2002-10-29 International Business Machines Corporation Double gate trench transistor
KR100464416B1 (ko) * 2002-05-14 2005-01-03 삼성전자주식회사 증가된 유효 채널 길이를 가지는 반도체 소자의 제조 방법
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
KR100469128B1 (ko) * 2002-11-07 2005-01-29 삼성전자주식회사 자기정렬된 얕은 트렌치 소자분리를 갖는 불휘발성 메모리장치의 플로팅 게이트 형성방법
JP2004214379A (ja) * 2002-12-27 2004-07-29 Toshiba Corp 半導体装置、ダイナミック型半導体記憶装置及び半導体装置の製造方法
US7502370B2 (en) * 2003-01-21 2009-03-10 Nextio Inc. Network controller for obtaining a plurality of network port identifiers in response to load-store transactions from a corresponding plurality of operating system domains within a load-store architecture
KR100517559B1 (ko) 2003-06-27 2005-09-28 삼성전자주식회사 핀 전계효과 트랜지스터 및 그의 핀 형성방법
JP3936315B2 (ja) * 2003-07-04 2007-06-27 株式会社東芝 半導体記憶装置及びその製造方法
US6911697B1 (en) 2003-08-04 2005-06-28 Advanced Micro Devices, Inc. Semiconductor device having a thin fin and raised source/drain areas
KR100532352B1 (ko) * 2003-08-21 2005-12-01 삼성전자주식회사 반도체 장치 및 반도체 장치의 제조 방법
US7029958B2 (en) * 2003-11-04 2006-04-18 Advanced Micro Devices, Inc. Self aligned damascene gate
KR100518602B1 (ko) * 2003-12-03 2005-10-04 삼성전자주식회사 돌출된 형태의 채널을 갖는 모스 트랜지스터 및 그 제조방법
KR100574340B1 (ko) 2004-02-02 2006-04-26 삼성전자주식회사 반도체 장치 및 이의 형성 방법
KR100526889B1 (ko) * 2004-02-10 2005-11-09 삼성전자주식회사 핀 트랜지스터 구조
JP3915810B2 (ja) * 2004-02-26 2007-05-16 セイコーエプソン株式会社 有機エレクトロルミネッセンス装置、その製造方法、及び電子機器
US7115947B2 (en) * 2004-03-18 2006-10-03 International Business Machines Corporation Multiple dielectric finfet structure and method
KR100530496B1 (ko) * 2004-04-20 2005-11-22 삼성전자주식회사 반도체 장치, 리세스 게이트 전극 형성 방법 및 반도체장치의 제조 방법
KR20050108916A (ko) 2004-05-14 2005-11-17 삼성전자주식회사 다마신 공정을 이용한 핀 전계 효과 트랜지스터의 형성 방법
US7063630B2 (en) * 2004-05-17 2006-06-20 Acushnet Company Lightweight performance golf balls
JP4675585B2 (ja) * 2004-06-22 2011-04-27 シャープ株式会社 電界効果トランジスタ
US7396720B2 (en) * 2004-07-27 2008-07-08 Micron Technology, Inc. High coupling memory cell
JP2006135067A (ja) * 2004-11-05 2006-05-25 Toshiba Corp 半導体装置およびその製造方法
US20060105578A1 (en) * 2004-11-12 2006-05-18 Shih-Ping Hong High-selectivity etching process
US20070228425A1 (en) * 2006-04-04 2007-10-04 Miller Gayle W Method and manufacturing low leakage MOSFETs and FinFETs
US7456068B2 (en) * 2006-06-08 2008-11-25 Intel Corporation Forming ultra-shallow junctions
US7678648B2 (en) * 2006-07-14 2010-03-16 Micron Technology, Inc. Subresolution silicon features and methods for forming the same

Also Published As

Publication number Publication date
US8084845B2 (en) 2011-12-27
US8981444B2 (en) 2015-03-17
US20120061740A1 (en) 2012-03-15
WO2008008204A1 (en) 2008-01-17
US20080014699A1 (en) 2008-01-17
US7678648B2 (en) 2010-03-16
US20100148234A1 (en) 2010-06-17
KR101403509B1 (ko) 2014-06-09
CN101490821B (zh) 2013-01-23
JP2009544150A (ja) 2009-12-10
EP2041781A1 (en) 2009-04-01
CN101490821A (zh) 2009-07-22
KR20090039783A (ko) 2009-04-22

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