JP5148852B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5148852B2 JP5148852B2 JP2006242648A JP2006242648A JP5148852B2 JP 5148852 B2 JP5148852 B2 JP 5148852B2 JP 2006242648 A JP2006242648 A JP 2006242648A JP 2006242648 A JP2006242648 A JP 2006242648A JP 5148852 B2 JP5148852 B2 JP 5148852B2
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- electric field
- drift region
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- 239000004065 semiconductor Substances 0.000 title claims description 61
- 230000005684 electric field Effects 0.000 claims description 72
- 239000012535 impurity Substances 0.000 claims description 71
- 210000000746 body region Anatomy 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 13
- 230000015556 catabolic process Effects 0.000 description 33
- 230000000694 effects Effects 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 229910052796 boron Inorganic materials 0.000 description 3
- -1 boron ions Chemical class 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 230000002040 relaxant effect Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Description
J.A.Appels and H.M.J.Vaes,「High voltage thin layer devices (RESURF devices)」、International Electron Devices Meeting Technical Digest、p.238-241、1979年12月 J.A.van der Pol他15名、「A-BCD:An economic 100V RESURF silicon-on-insulator BCD technology for consumer and automotive applications」、The 12th International Symposium on Power Semiconductor Devices and ICs、p.327-330、2000年5月 N.Cezac他4名、「A new generation of power unipolar devices: the concept of the Floating islands MOS transistor(FLIMOST) 」、The 12th International Symposium on Power Semiconductor Devices and ICs、p.69-72、2000年5月
Claims (2)
- 一導電型の半導体層表面に選択的に形成された、一導電型のボディー領域及び逆導電型のドリフト領域と、
前記ボディー領域表面に選択的に形成された逆導電型のソース領域と、
前記ドリフト領域表面に選択的に形成された逆導電型のドレイン領域と、
前記ソース領域と前記ドリフト領域との間の前記ボディー領域及び前記ソース領域側の前記ドリフト領域上に、ゲート絶縁膜を介して形成されたゲート電極と、
前記ソース領域に接続するソース電極と、
前記ドレイン領域に接続するドレイン電極とを備えた半導体装置において、
前記ゲート電極が積層形成された前記ゲート絶縁膜直下の前記ドリフト領域中に、周囲を前記ドリフト領域で囲まれ、前記ゲート電極のドレイン領域側エッジより前記ドレイン領域側に突出しない構造の一導電型の不純物領域を備え、
前記不純物領域の不純物濃度は、前記不純物領域と前記ドリフト領域とで形成する接合の電界極大点の電界強度が、前記ゲート電極エッジ直下の前記ドリフト領域部あるいは前記ゲート絶縁膜の厚さが厚くなる境界の前記ドリフト領域部、前記ドレイン領域と前記ドリフト領域との接合部のいずれかの電界極大点の電界強度より小さいか、あるいは略一致するよう設定することで、前記不純物領域に電界を分散させ、最大電界を下げる構造としたことを特徴とする半導体装置。 - 請求項1記載の半導体装置において、前記一導電型の半導体層を埋め込み絶縁膜に替え、前記ドリフト領域は、支持基板及び前記埋め込み絶縁膜上に形成した半導体層からなり、該半導体層に選択的に前記ボディー領域が形成されていることを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006242648A JP5148852B2 (ja) | 2006-09-07 | 2006-09-07 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006242648A JP5148852B2 (ja) | 2006-09-07 | 2006-09-07 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008066508A JP2008066508A (ja) | 2008-03-21 |
JP5148852B2 true JP5148852B2 (ja) | 2013-02-20 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2006242648A Expired - Fee Related JP5148852B2 (ja) | 2006-09-07 | 2006-09-07 | 半導体装置 |
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JP (1) | JP5148852B2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010016180A (ja) * | 2008-07-03 | 2010-01-21 | Panasonic Corp | 半導体装置 |
JP4595002B2 (ja) | 2008-07-09 | 2010-12-08 | 株式会社東芝 | 半導体装置 |
JP2010283366A (ja) * | 2010-07-23 | 2010-12-16 | Toshiba Corp | 半導体装置 |
CN103035643B (zh) * | 2012-12-20 | 2015-10-21 | 贵州大学 | 一种基于键合技术的三维集成功率半导体及其制作工艺 |
CN106158956B (zh) | 2015-04-08 | 2020-02-11 | 无锡华润上华科技有限公司 | 具有resurf结构的ldmosfet及其制造方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2650456B2 (ja) * | 1989-07-04 | 1997-09-03 | 富士電機株式会社 | Mos半導体装置 |
JPH05121738A (ja) * | 1991-10-24 | 1993-05-18 | Fuji Electric Co Ltd | Misfetを有する半導体装置 |
JPH0766398A (ja) * | 1993-08-26 | 1995-03-10 | Nec Corp | 高耐圧半導体装置 |
JP3218267B2 (ja) * | 1994-04-11 | 2001-10-15 | 新電元工業株式会社 | 半導体装置 |
JPH0818041A (ja) * | 1994-06-29 | 1996-01-19 | Rohm Co Ltd | 高耐圧半導体装置およびその製造方法 |
DE69522926T2 (de) * | 1995-05-02 | 2002-03-28 | St Microelectronics Srl | Resurf-IC mit dünner Epitaxialschicht für HV-P-Kanal und N-Kanal-Anordnungen wobei Source und Drain nicht an Erdungspotential gelegt sind |
US6168983B1 (en) * | 1996-11-05 | 2001-01-02 | Power Integrations, Inc. | Method of making a high-voltage transistor with multiple lateral conduction layers |
JP2001015741A (ja) * | 1999-06-30 | 2001-01-19 | Toshiba Corp | 電界効果トランジスタ |
JP3749191B2 (ja) * | 2001-03-22 | 2006-02-22 | 松下電器産業株式会社 | 高耐圧半導体装置 |
WO2005029590A1 (ja) * | 2003-09-18 | 2005-03-31 | Shindengen Electric Manufacturing Co., Ltd. | 横型短チャネルdmos及びその製造方法並びに半導体装置 |
JP2005236142A (ja) * | 2004-02-20 | 2005-09-02 | Shindengen Electric Mfg Co Ltd | 横型短チャネルdmos及びその製造方法並びに半導体装置 |
JP4260777B2 (ja) * | 2004-07-22 | 2009-04-30 | パナソニック株式会社 | 半導体装置及びその製造方法 |
JP4890793B2 (ja) * | 2005-06-09 | 2012-03-07 | トヨタ自動車株式会社 | 半導体装置の製造方法 |
EP1852916A1 (en) * | 2006-05-05 | 2007-11-07 | Austriamicrosystems AG | High voltage transistor |
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2006
- 2006-09-07 JP JP2006242648A patent/JP5148852B2/ja not_active Expired - Fee Related
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JP2008066508A (ja) | 2008-03-21 |
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