JP5132904B2 - 基板位置決め方法，基板位置検出方法，基板回収方法及び基板位置ずれ補正装置 - Google Patents

基板位置決め方法，基板位置検出方法，基板回収方法及び基板位置ずれ補正装置 Download PDF

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JP5132904B2
JP5132904B2 JP2006240037A JP2006240037A JP5132904B2 JP 5132904 B2 JP5132904 B2 JP 5132904B2 JP 2006240037 A JP2006240037 A JP 2006240037A JP 2006240037 A JP2006240037 A JP 2006240037A JP 5132904 B2 JP5132904 B2 JP 5132904B2
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substrate
wafer
imaging means
peripheral edge
detected
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JP2008066372A5 (https=
JP2008066372A (ja
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健弘 新藤
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Priority to JP2006240037A priority Critical patent/JP5132904B2/ja
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to KR1020117006693A priority patent/KR101058884B1/ko
Priority to KR1020097000470A priority patent/KR101078817B1/ko
Priority to CN2007800207912A priority patent/CN101461053B/zh
Priority to US12/439,833 priority patent/US8135486B2/en
Priority to PCT/JP2007/066088 priority patent/WO2008029609A1/ja
Publication of JP2008066372A publication Critical patent/JP2008066372A/ja
Publication of JP2008066372A5 publication Critical patent/JP2008066372A5/ja
Priority to US13/365,377 priority patent/US9082798B2/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0606—Position monitoring, e.g. misposition detection or presence detection

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  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP2006240037A 2006-09-05 2006-09-05 基板位置決め方法，基板位置検出方法，基板回収方法及び基板位置ずれ補正装置 Active JP5132904B2 (ja)

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Application Number Priority Date Filing Date Title
JP2006240037A JP5132904B2 (ja) 2006-09-05 2006-09-05 基板位置決め方法，基板位置検出方法，基板回収方法及び基板位置ずれ補正装置
KR1020097000470A KR101078817B1 (ko) 2006-09-05 2007-08-20 기판 위치 결정 방법, 기판 위치 검출 방법 및 기판 회수 방법
CN2007800207912A CN101461053B (zh) 2006-09-05 2007-08-20 基板定位方法、基板位置检测方法、基板回收方法
US12/439,833 US8135486B2 (en) 2006-09-05 2007-08-20 Substrate position determining method and substrate position detecting method
KR1020117006693A KR101058884B1 (ko) 2006-09-05 2007-08-20 반도체 제조 장치
PCT/JP2007/066088 WO2008029609A1 (en) 2006-09-05 2007-08-20 Substrate positioning method, substrate position detecting method, and substrate retrieving method
US13/365,377 US9082798B2 (en) 2006-09-05 2012-02-03 Substrate collecting method

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Application Number Priority Date Filing Date Title
JP2006240037A JP5132904B2 (ja) 2006-09-05 2006-09-05 基板位置決め方法，基板位置検出方法，基板回収方法及び基板位置ずれ補正装置

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JP2008066372A JP2008066372A (ja) 2008-03-21
JP2008066372A5 JP2008066372A5 (https=) 2011-05-12
JP5132904B2 true JP5132904B2 (ja) 2013-01-30

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US (2) US8135486B2 (https=)
JP (1) JP5132904B2 (https=)
KR (2) KR101078817B1 (https=)
CN (1) CN101461053B (https=)
WO (1) WO2008029609A1 (https=)

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Publication number Publication date
CN101461053A (zh) 2009-06-17
KR20110044328A (ko) 2011-04-28
WO2008029609A1 (en) 2008-03-13
US8135486B2 (en) 2012-03-13
US20120130529A1 (en) 2012-05-24
KR20090026335A (ko) 2009-03-12
KR101078817B1 (ko) 2011-11-01
JP2008066372A (ja) 2008-03-21
KR101058884B1 (ko) 2011-08-23
US9082798B2 (en) 2015-07-14
CN101461053B (zh) 2010-09-29
US20100030347A1 (en) 2010-02-04

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