JP5096855B2 - 配線基板の製造方法及び配線基板 - Google Patents

配線基板の製造方法及び配線基板 Download PDF

Info

Publication number
JP5096855B2
JP5096855B2 JP2007250805A JP2007250805A JP5096855B2 JP 5096855 B2 JP5096855 B2 JP 5096855B2 JP 2007250805 A JP2007250805 A JP 2007250805A JP 2007250805 A JP2007250805 A JP 2007250805A JP 5096855 B2 JP5096855 B2 JP 5096855B2
Authority
JP
Japan
Prior art keywords
wiring
reinforcing
wiring member
wiring board
reinforcing portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2007250805A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009081356A (ja
JP2009081356A5 (enExample
Inventor
一宏 大島
章夫 堀内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2007250805A priority Critical patent/JP5096855B2/ja
Publication of JP2009081356A publication Critical patent/JP2009081356A/ja
Publication of JP2009081356A5 publication Critical patent/JP2009081356A5/ja
Application granted granted Critical
Publication of JP5096855B2 publication Critical patent/JP5096855B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2007250805A 2007-09-27 2007-09-27 配線基板の製造方法及び配線基板 Active JP5096855B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007250805A JP5096855B2 (ja) 2007-09-27 2007-09-27 配線基板の製造方法及び配線基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007250805A JP5096855B2 (ja) 2007-09-27 2007-09-27 配線基板の製造方法及び配線基板

Publications (3)

Publication Number Publication Date
JP2009081356A JP2009081356A (ja) 2009-04-16
JP2009081356A5 JP2009081356A5 (enExample) 2010-05-13
JP5096855B2 true JP5096855B2 (ja) 2012-12-12

Family

ID=40655867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007250805A Active JP5096855B2 (ja) 2007-09-27 2007-09-27 配線基板の製造方法及び配線基板

Country Status (1)

Country Link
JP (1) JP5096855B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101842079B1 (ko) * 2016-06-23 2018-05-15 (주)심텍 박형의 인쇄회로기판 및 이의 제조 방법

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112009000839T5 (de) * 2008-04-10 2011-05-12 World Properties, Inc., Lincolnwood Schaltungsmaterialien mit verbesserter Bindung, Verfahren zur Herstellung hiervon und hieraus hergestellte Artikel
KR101678052B1 (ko) * 2010-02-25 2016-11-22 삼성전자 주식회사 단층 배선 패턴을 포함한 인쇄회로기판(ｐｃｂ), ｐｃｂ를 포함한 반도체 패키지, 반도체 패키지를 포함한 전기전자장치, ｐｃｂ제조방법, 및 반도체 패키지 제조방법
JP5444136B2 (ja) * 2010-06-18 2014-03-19 新光電気工業株式会社 配線基板
JP5578962B2 (ja) * 2010-06-24 2014-08-27 新光電気工業株式会社 配線基板
JP2012069739A (ja) * 2010-09-24 2012-04-05 Shinko Electric Ind Co Ltd 配線基板の製造方法
KR101119306B1 (ko) * 2010-11-04 2012-03-16 삼성전기주식회사 회로기판의 제조방법
WO2013065287A1 (ja) * 2011-11-01 2013-05-10 住友ベークライト株式会社 半導体パッケージの製造方法
US9440135B2 (en) * 2012-05-29 2016-09-13 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Multilayer electronic structures with integral vias extending in in-plane direction
US11284507B2 (en) * 2017-10-12 2022-03-22 Dai Nippon Printing Co., Ltd. Wiring board and method for manufacturing wiring board
JP2019179831A (ja) * 2018-03-30 2019-10-17 新光電気工業株式会社 配線基板、配線基板の製造方法
CN111755409A (zh) * 2019-03-27 2020-10-09 恒劲科技股份有限公司 半导体封装基板及其制法与电子封装件及其制法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3100949B2 (ja) * 1998-12-07 2000-10-23 日本特殊陶業株式会社 配線基板の製造方法
JP2000232260A (ja) * 1999-02-09 2000-08-22 Ngk Spark Plug Co Ltd 配線基板、スティフナ及びこれらの製造方法
JP3615727B2 (ja) * 2001-10-31 2005-02-02 新光電気工業株式会社 半導体装置用パッケージ
JP3983146B2 (ja) * 2002-09-17 2007-09-26 Ｎｅｃエレクトロニクス株式会社 多層配線基板の製造方法
JP4731919B2 (ja) * 2004-01-23 2011-07-27 株式会社半導体エネルギー研究所 フィルム状物品
JP2005268404A (ja) * 2004-03-17 2005-09-29 Sanyo Electric Co Ltd 回路モジュール
JP2007059821A (ja) * 2005-08-26 2007-03-08 Shinko Electric Ind Co Ltd 配線基板の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101842079B1 (ko) * 2016-06-23 2018-05-15 (주)심텍 박형의 인쇄회로기판 및 이의 제조 방법

Also Published As

Publication number Publication date
JP2009081356A (ja) 2009-04-16

Similar Documents

Publication Publication Date Title
JP5096855B2 (ja) 配線基板の製造方法及び配線基板
JP5195422B2 (ja) 配線基板、実装基板及び電子装置
TWI394503B (zh) 佈線板及其製造方法
JP5144222B2 (ja) 配線基板及びその製造方法
US8035035B2 (en) Multi-layer wiring board and method of manufacturing the same
JP5339928B2 (ja) 配線基板及びその製造方法
US8110754B2 (en) Multi-layer wiring board and method of manufacturing the same
US20140202740A1 (en) Method of Manufacturing Multilayer Wiring Substrate, and Multilayer Wiring Substrate
CN102111951B (zh) 多层布线基板
CN102573278B (zh) 多层布线基板
CN107770947A (zh) 印刷布线板和印刷布线板的制造方法
JP5280032B2 (ja) 配線基板
JP2009135184A (ja) 配線基板及びその製造方法
CN101399248A (zh) 配线基板及其制造的方法
KR101139084B1 (ko) 다층 프린트 기판 및 그 제조 방법
US8102664B2 (en) Printed circuit board and method of manufacturing the same
EP2086295B1 (en) Printed circuit board and method of manufacturing the same
JP2009267149A (ja) 部品内蔵配線板、部品内蔵配線板の製造方法
US8658905B2 (en) Multilayer wiring substrate
JP4266717B2 (ja) 半導体装置の製造方法
JP2008124247A (ja) 部品内蔵基板及びその製造方法
CN102686024B (zh) 多层配线基板
JP2004356219A (ja) 配線基板及びその製造方法
KR101924458B1 (ko) 전자 칩이 내장된 회로기판의 제조 방법
JP2005302969A (ja) 配線基板

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100331

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100331

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20111130

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111206

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120203

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120904

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120921

R150 Certificate of patent or registration of utility model

Ref document number: 5096855

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150928

Year of fee payment: 3