JP5089336B2 - パッケージ用シリコン基板 - Google Patents

パッケージ用シリコン基板 Download PDF

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Publication number
JP5089336B2
JP5089336B2 JP2007280695A JP2007280695A JP5089336B2 JP 5089336 B2 JP5089336 B2 JP 5089336B2 JP 2007280695 A JP2007280695 A JP 2007280695A JP 2007280695 A JP2007280695 A JP 2007280695A JP 5089336 B2 JP5089336 B2 JP 5089336B2
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Japan
Prior art keywords
electrode
cavity
silicon substrate
wiring
package
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JP2007280695A
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English (en)
Japanese (ja)
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JP2009111082A5 (enExample
JP2009111082A (ja
Inventor
晶紀 白石
啓 村山
裕一 田口
昌宏 春原
光敏 東
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2007280695A priority Critical patent/JP5089336B2/ja
Priority to US12/257,626 priority patent/US7989927B2/en
Publication of JP2009111082A publication Critical patent/JP2009111082A/ja
Publication of JP2009111082A5 publication Critical patent/JP2009111082A5/ja
Priority to US13/116,623 priority patent/US8106484B2/en
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Publication of JP5089336B2 publication Critical patent/JP5089336B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/147—Semiconductor insulating substrates
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
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    • H10H20/8506—Containers

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2007280695A 2007-10-29 2007-10-29 パッケージ用シリコン基板 Active JP5089336B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2007280695A JP5089336B2 (ja) 2007-10-29 2007-10-29 パッケージ用シリコン基板
US12/257,626 US7989927B2 (en) 2007-10-29 2008-10-24 Silicon substrate for package
US13/116,623 US8106484B2 (en) 2007-10-29 2011-05-26 Silicon substrate for package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007280695A JP5089336B2 (ja) 2007-10-29 2007-10-29 パッケージ用シリコン基板

Publications (3)

Publication Number Publication Date
JP2009111082A JP2009111082A (ja) 2009-05-21
JP2009111082A5 JP2009111082A5 (enExample) 2010-09-24
JP5089336B2 true JP5089336B2 (ja) 2012-12-05

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JP2007280695A Active JP5089336B2 (ja) 2007-10-29 2007-10-29 パッケージ用シリコン基板

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US (2) US7989927B2 (enExample)
JP (1) JP5089336B2 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4342174B2 (ja) * 2002-12-27 2009-10-14 新光電気工業株式会社 電子デバイス及びその製造方法
JP5455538B2 (ja) * 2008-10-21 2014-03-26 キヤノン株式会社 半導体装置及びその製造方法
TW201114003A (en) * 2008-12-11 2011-04-16 Xintec Inc Chip package structure and method for fabricating the same
US20100176507A1 (en) * 2009-01-14 2010-07-15 Hymite A/S Semiconductor-based submount with electrically conductive feed-throughs
JP5730654B2 (ja) 2010-06-24 2015-06-10 新光電気工業株式会社 配線基板及びその製造方法
KR101692434B1 (ko) 2010-06-28 2017-01-18 삼성전자주식회사 반도체 소자 및 그 제조 방법
KR101780423B1 (ko) * 2011-03-18 2017-09-22 삼성전자주식회사 반도체 장치 및 이의 제조 방법
JP5826782B2 (ja) * 2013-03-19 2015-12-02 株式会社東芝 半導体装置の製造方法
KR20150033979A (ko) * 2013-09-25 2015-04-02 삼성전기주식회사 인터포저 기판 및 인터포저 기판 제조 방법
JP6561635B2 (ja) * 2015-07-09 2019-08-21 大日本印刷株式会社 貫通電極基板及びその製造方法
CN105374781A (zh) * 2015-09-07 2016-03-02 武汉华星光电技术有限公司 引脚结构和显示设备

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0464254A (ja) * 1990-07-04 1992-02-28 Ngk Insulators Ltd セラミック配線基板及びその製造方法
JPH05145230A (ja) * 1991-11-22 1993-06-11 Fujitsu Ltd ガラスセラミツク基板の配線パターン形成方法
JP3264147B2 (ja) * 1995-07-18 2002-03-11 日立電線株式会社 半導体装置、半導体装置用インターポーザ及びその製造方法
JP2002043456A (ja) * 2000-07-24 2002-02-08 Victor Co Of Japan Ltd 多層印刷配線基板
JP2002176070A (ja) * 2000-12-07 2002-06-21 Sanyo Electric Co Ltd 半導体装置
JP2002190544A (ja) * 2000-12-19 2002-07-05 Hitachi Cable Ltd 配線基板、半導体装置、及びその製造方法
JP2002261204A (ja) * 2001-03-02 2002-09-13 Hitachi Aic Inc インターポーザ基板及びその電子部品実装体
US6903442B2 (en) * 2002-08-29 2005-06-07 Micron Technology, Inc. Semiconductor component having backside pin contacts
JP4126389B2 (ja) * 2002-09-20 2008-07-30 カシオ計算機株式会社 半導体パッケージの製造方法
JP4064254B2 (ja) 2003-01-30 2008-03-19 京セラ株式会社 携帯通信端末のデータバックアップ方法、データバックアップ装置及び携帯通信端末
JP4492071B2 (ja) * 2003-09-12 2010-06-30 パナソニック株式会社 配線基板の製造方法
JP4800585B2 (ja) * 2004-03-30 2011-10-26 ルネサスエレクトロニクス株式会社 貫通電極の製造方法、シリコンスペーサーの製造方法
JP4634735B2 (ja) * 2004-04-20 2011-02-16 大日本印刷株式会社 多層配線基板の製造方法
JP2006287085A (ja) * 2005-04-04 2006-10-19 Sony Corp 配線基板の製造方法
KR100631993B1 (ko) * 2005-07-20 2006-10-09 삼성전기주식회사 Ｌｅｄ 패키지 및 그 제조방법
JP5209177B2 (ja) * 2005-11-14 2013-06-12 新光電気工業株式会社 半導体装置および半導体装置の製造方法
JP4996101B2 (ja) * 2006-02-02 2012-08-08 新光電気工業株式会社 半導体装置及び半導体装置の製造方法
US20080136038A1 (en) * 2006-12-06 2008-06-12 Sergey Savastiouk Integrated circuits with conductive features in through holes passing through other conductive features and through a semiconductor substrate
US8021931B2 (en) * 2006-12-11 2011-09-20 Stats Chippac, Inc. Direct via wire bonding and method of assembling the same
DE102007019552B4 (de) * 2007-04-25 2009-12-17 Infineon Technologies Ag Verfahren zur Herstellung eines Substrats mit Durchführung sowie Substrat und Halbleitermodul mit Durchführung

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