JP4869011B2 - メモリシステム - Google Patents
メモリシステム Download PDFInfo
- Publication number
- JP4869011B2 JP4869011B2 JP2006269629A JP2006269629A JP4869011B2 JP 4869011 B2 JP4869011 B2 JP 4869011B2 JP 2006269629 A JP2006269629 A JP 2006269629A JP 2006269629 A JP2006269629 A JP 2006269629A JP 4869011 B2 JP4869011 B2 JP 4869011B2
- Authority
- JP
- Japan
- Prior art keywords
- refresh
- address
- pulse
- signal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40618—Refresh operations over multiple banks or interleaving
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40622—Partial refresh of memory arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1045—Read-write mode select circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Dram (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006269629A JP4869011B2 (ja) | 2006-09-29 | 2006-09-29 | メモリシステム |
EP07114766A EP1906410B1 (en) | 2006-09-29 | 2007-08-22 | Semiconductors memory device with partial refresh function |
US11/892,497 US7545699B2 (en) | 2006-09-29 | 2007-08-23 | Semiconductor memory device with partial refresh function |
KR1020070087707A KR100885011B1 (ko) | 2006-09-29 | 2007-08-30 | 반도체 기억 장치 및 메모리 시스템 |
CN2007101479954A CN101154439B (zh) | 2006-09-29 | 2007-08-30 | 一种具有部分刷新功能的半导体存储器设备 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006269629A JP4869011B2 (ja) | 2006-09-29 | 2006-09-29 | メモリシステム |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008090904A JP2008090904A (ja) | 2008-04-17 |
JP4869011B2 true JP4869011B2 (ja) | 2012-02-01 |
Family
ID=38704775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006269629A Expired - Fee Related JP4869011B2 (ja) | 2006-09-29 | 2006-09-29 | メモリシステム |
Country Status (5)
Country | Link |
---|---|
US (1) | US7545699B2 (ko) |
EP (1) | EP1906410B1 (ko) |
JP (1) | JP4869011B2 (ko) |
KR (1) | KR100885011B1 (ko) |
CN (1) | CN101154439B (ko) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20110074285A (ko) | 2009-12-24 | 2011-06-30 | 삼성전자주식회사 | 부분 셀프 리프레쉬를 수행하는 반도체 메모리 장치 및 이를 구비하는 반도체 메모리 시스템 |
US8284614B2 (en) * | 2010-12-28 | 2012-10-09 | Hynix Semiconductor Inc. | Refresh control circuit and method for semiconductor memory device |
KR20120077280A (ko) * | 2010-12-30 | 2012-07-10 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치의 컬럼 어드레스 카운터 회로 |
KR20120081352A (ko) | 2011-01-11 | 2012-07-19 | 에스케이하이닉스 주식회사 | 리프레시 제어 회로, 이를 이용한 메모리 장치 및 그 리프레시 제어 방법 |
WO2013147746A1 (en) * | 2012-03-27 | 2013-10-03 | Intel Corporation | Reduction of power consumption in memory devices during refresh modes |
CN104766624B (zh) * | 2014-01-06 | 2017-11-28 | 晶豪科技股份有限公司 | 自动更新存储器单元的方法及使用其的半导体存储装置 |
TWI737592B (zh) * | 2015-03-23 | 2021-09-01 | 日商新力股份有限公司 | 影像感測器、影像處理方法及電子機器 |
KR20160119588A (ko) * | 2015-04-06 | 2016-10-14 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
KR102362605B1 (ko) * | 2015-08-06 | 2022-02-15 | 에스케이하이닉스 주식회사 | 메모리 장치 |
KR20170059616A (ko) * | 2015-11-23 | 2017-05-31 | 에스케이하이닉스 주식회사 | 적층형 메모리 장치 및 이를 포함하는 반도체 메모리 시스템 |
US9576637B1 (en) * | 2016-05-25 | 2017-02-21 | Advanced Micro Devices, Inc. | Fine granularity refresh |
US10332582B2 (en) | 2017-08-02 | 2019-06-25 | Qualcomm Incorporated | Partial refresh technique to save memory refresh power |
US20190066760A1 (en) * | 2017-08-23 | 2019-02-28 | Nanya Technology Corporation | Dram and method for operating the same |
US12020740B2 (en) * | 2018-06-26 | 2024-06-25 | Rambus Inc. | Memory device having non-uniform refresh |
CN116741220B (zh) * | 2022-03-04 | 2024-07-05 | 长鑫存储技术有限公司 | 一种刷新电路、存储器及刷新方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5890198A (en) * | 1996-10-22 | 1999-03-30 | Micron Technology, Inc. | Intelligent refresh controller for dynamic memory devices |
US6215725B1 (en) * | 1997-07-23 | 2001-04-10 | Sharp Kabushiki Kaisha | Clock-synchronized memory |
JP2000048560A (ja) | 1998-07-24 | 2000-02-18 | Matsushita Electric Ind Co Ltd | 半導体回路 |
US6590822B2 (en) * | 2001-05-07 | 2003-07-08 | Samsung Electronics Co., Ltd. | System and method for performing partial array self-refresh operation in a semiconductor memory device |
KR100424178B1 (ko) | 2001-09-20 | 2004-03-24 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 내부어드레스 발생회로 |
JP2003132677A (ja) * | 2001-10-29 | 2003-05-09 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP4249412B2 (ja) * | 2001-12-27 | 2009-04-02 | Necエレクトロニクス株式会社 | 半導体記憶装置 |
JP2004220697A (ja) * | 2003-01-15 | 2004-08-05 | Seiko Epson Corp | 半導体メモリ装置のリフレッシュ制御 |
JP2004227624A (ja) | 2003-01-20 | 2004-08-12 | Seiko Epson Corp | 半導体メモリ装置のパーシャルリフレッシュ |
WO2004070729A1 (ja) | 2003-02-05 | 2004-08-19 | Fujitsu Limited | 半導体メモリ |
JP3915711B2 (ja) * | 2003-02-12 | 2007-05-16 | セイコーエプソン株式会社 | 半導体メモリ装置 |
JP2004259343A (ja) | 2003-02-25 | 2004-09-16 | Renesas Technology Corp | 半導体記憶装置 |
JP2004273029A (ja) * | 2003-03-10 | 2004-09-30 | Sony Corp | 記憶装置およびそれに用いられるリフレッシュ制御回路ならびにリフレッシュ方法 |
KR100591760B1 (ko) * | 2004-01-09 | 2006-06-22 | 삼성전자주식회사 | 가변 가능한 메모리 사이즈를 갖는 반도체 메모리 장치 |
-
2006
- 2006-09-29 JP JP2006269629A patent/JP4869011B2/ja not_active Expired - Fee Related
-
2007
- 2007-08-22 EP EP07114766A patent/EP1906410B1/en not_active Not-in-force
- 2007-08-23 US US11/892,497 patent/US7545699B2/en not_active Expired - Fee Related
- 2007-08-30 CN CN2007101479954A patent/CN101154439B/zh not_active Expired - Fee Related
- 2007-08-30 KR KR1020070087707A patent/KR100885011B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP1906410A3 (en) | 2009-08-19 |
CN101154439A (zh) | 2008-04-02 |
US7545699B2 (en) | 2009-06-09 |
EP1906410A2 (en) | 2008-04-02 |
KR100885011B1 (ko) | 2009-02-20 |
KR20080030470A (ko) | 2008-04-04 |
CN101154439B (zh) | 2010-09-08 |
US20080080286A1 (en) | 2008-04-03 |
EP1906410B1 (en) | 2011-10-19 |
JP2008090904A (ja) | 2008-04-17 |
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