JP4864810B2 - チップ内蔵基板の製造方法 - Google Patents

チップ内蔵基板の製造方法 Download PDF

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Publication number
JP4864810B2
JP4864810B2 JP2007133947A JP2007133947A JP4864810B2 JP 4864810 B2 JP4864810 B2 JP 4864810B2 JP 2007133947 A JP2007133947 A JP 2007133947A JP 2007133947 A JP2007133947 A JP 2007133947A JP 4864810 B2 JP4864810 B2 JP 4864810B2
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JP
Japan
Prior art keywords
substrate
chip
wire
electrode
sealing resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2007133947A
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English (en)
Japanese (ja)
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JP2008288489A5 (enExample
JP2008288489A (ja
Inventor
敏男 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2007133947A priority Critical patent/JP4864810B2/ja
Priority to US12/123,744 priority patent/US7807510B2/en
Publication of JP2008288489A publication Critical patent/JP2008288489A/ja
Publication of JP2008288489A5 publication Critical patent/JP2008288489A5/ja
Application granted granted Critical
Publication of JP4864810B2 publication Critical patent/JP4864810B2/ja
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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H10W74/016—
    • H10W74/117—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10234—Metallic balls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1322—Encapsulation comprising more than one layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H10W72/5522—
    • H10W72/884—
    • H10W90/724—
    • H10W90/734—
    • H10W90/754—

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)
JP2007133947A 2007-05-21 2007-05-21 チップ内蔵基板の製造方法 Active JP4864810B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007133947A JP4864810B2 (ja) 2007-05-21 2007-05-21 チップ内蔵基板の製造方法
US12/123,744 US7807510B2 (en) 2007-05-21 2008-05-20 Method of manufacturing chip integrated substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007133947A JP4864810B2 (ja) 2007-05-21 2007-05-21 チップ内蔵基板の製造方法

Publications (3)

Publication Number Publication Date
JP2008288489A JP2008288489A (ja) 2008-11-27
JP2008288489A5 JP2008288489A5 (enExample) 2010-03-25
JP4864810B2 true JP4864810B2 (ja) 2012-02-01

Family

ID=40072795

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007133947A Active JP4864810B2 (ja) 2007-05-21 2007-05-21 チップ内蔵基板の製造方法

Country Status (2)

Country Link
US (1) US7807510B2 (enExample)
JP (1) JP4864810B2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010192812A (ja) * 2009-02-20 2010-09-02 Sharp Corp 電子機器モジュール
KR101583354B1 (ko) * 2009-06-01 2016-01-07 삼성전자주식회사 반도체 소자 패키지의 형성방법
JP5589462B2 (ja) * 2010-03-16 2014-09-17 カシオ計算機株式会社 半導体装置及び半導体装置の製造方法
JP5563918B2 (ja) * 2010-07-22 2014-07-30 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置の製造方法
US8569882B2 (en) * 2011-03-24 2013-10-29 Stats Chippac Ltd. Integrated circuit packaging system with collapsed multi-integration package and method of manufacture thereof
JP2013183137A (ja) * 2012-03-05 2013-09-12 Denso Corp 回路基板及び回路部品を基板に搭載する方法
DE102013103301B4 (de) 2012-04-13 2023-01-26 Samsung Electronics Co., Ltd. Elektronische Gehäuse-auf-Gehäuse-Vorrichtungen mit Abdichtungsschichten und Verfahren zum Herstellen derselben
US9859200B2 (en) 2014-12-29 2018-01-02 STATS ChipPAC Pte. Ltd. Integrated circuit packaging system with interposer support structure mechanism and method of manufacture thereof
CN105845642A (zh) * 2016-05-26 2016-08-10 武汉华星光电技术有限公司 层叠封装及移动终端
US10475775B2 (en) * 2016-08-31 2019-11-12 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
CN115297604A (zh) * 2022-08-30 2022-11-04 启晟软件科技(深圳)有限公司 一种双层电路板结构及其焊接方法
CN119361544A (zh) * 2024-10-22 2025-01-24 华天科技(南京)有限公司 一种双面贴芯片且电感背贴的封装结构及对应的封装方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5973393A (en) * 1996-12-20 1999-10-26 Lsi Logic Corporation Apparatus and method for stackable molded lead frame ball grid array packaging of integrated circuits
JP3196693B2 (ja) * 1997-08-05 2001-08-06 日本電気株式会社 表面弾性波装置およびその製造方法
JP3398721B2 (ja) * 1999-05-20 2003-04-21 アムコー テクノロジー コリア インコーポレーティド 半導体パッケージ及びその製造方法
JP2003347722A (ja) 2002-05-23 2003-12-05 Ibiden Co Ltd 多層電子部品搭載用基板及びその製造方法
JP3680839B2 (ja) * 2003-03-18 2005-08-10 セイコーエプソン株式会社 半導体装置および半導体装置の製造方法
JP4503349B2 (ja) * 2003-05-14 2010-07-14 パナソニック株式会社 電子部品実装体及びその製造方法
JP2006108284A (ja) * 2004-10-04 2006-04-20 Sharp Corp 半導体パッケージ
JP4520355B2 (ja) * 2005-04-19 2010-08-04 パナソニック株式会社 半導体モジュール
KR100836663B1 (ko) * 2006-02-16 2008-06-10 삼성전기주식회사 캐비티가 형성된 패키지 온 패키지 및 그 제조 방법
KR100817091B1 (ko) * 2007-03-02 2008-03-26 삼성전자주식회사 적층형 반도체 패키지 및 그 제조방법

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Publication number Publication date
US7807510B2 (en) 2010-10-05
US20080293189A1 (en) 2008-11-27
JP2008288489A (ja) 2008-11-27

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