JP4858541B2 - 中継基板および電子回路実装構造体 - Google Patents
中継基板および電子回路実装構造体 Download PDFInfo
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- JP4858541B2 JP4858541B2 JP2008522457A JP2008522457A JP4858541B2 JP 4858541 B2 JP4858541 B2 JP 4858541B2 JP 2008522457 A JP2008522457 A JP 2008522457A JP 2008522457 A JP2008522457 A JP 2008522457A JP 4858541 B2 JP4858541 B2 JP 4858541B2
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- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
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- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10515—Stacked components
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
- H05K3/305—Affixing by adhesive
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
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- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
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Description
図1A〜図1Dは本発明の実施の形態1にかかる中継基板を示す図で、図1Aは概略斜視図、図1Bは概略平面図、図1Cは図1Bに示す1C−1C線に沿った断面図、図1Dは図1Bに示す1D−1D線に沿った断面図である。
図5A〜図5Cは、本発明の実施の形態2にかかる中継基板を示す図で、図5Aは概略斜視図、図5Bは概略平面図で、図5Cは図5Bに示す5C−5C線に沿った断面図である。
図8A〜図8Cは、本発明の実施の形態3にかかる中継基板を示す図で、図8Aは概略斜視図、図8Bは概略平面図で、図8Cは図8Bに示す8C−8C線に沿った断面図である。
図10Aは、本発明の実施の形態4にかかる中継基板7の概略斜視図である。
10,20,30,40,50 ハウジング
11,21,31,41,51 凸部
12,22,32 接続端子電極
12a,22a,32a 上面端子電極
12b,22b,32b 下面端子電極
12c,22c,32c 接続電極
13,23,33 開口部
14,24,44,54 ハウジング外周側面
15,25 シールド層
34 はんだ接合部
100,200,300 電子回路実装構造体
101,201,301 第1の回路基板
102,202,302 第2の回路基板
103,203 接着用樹脂
104,204,304,112 回路部品
105,106,205,206,305,306 配線パターン
108,109 第2の回路基板の対向する辺
110 チップ部品
111 シールドケース
Claims (4)
- 第1の回路基板と、
第2の回路基板と、
前記第1の回路基板と前記第2の回路基板とを接続する中継基板と、
前記第1の回路基板、前記第2の回路基板および前記中継基板を接着する接着用樹脂とを備え、
前記中継基板は、
多角形の額縁形状でかつその外周側面の対向する面にそれぞれ2個の凸部を有するハウジングと、
前記ハウジングの上下面に位置する溝部と、
前記ハウジングの上下面を接続する複数の接続端子電極と、
前記接続端子電極の端部であり前記溝部に形成され前記ハウジングの表面から突出しない複数の接続端子とを有し、
前記接着用樹脂は、
前記中継基板の前記凸部間であって前記凸部が形成されていない前記外周側面に形成されていることを特徴とする電子回路実装構造体。 - 第1の回路基板と、
第2の回路基板と、
前記第1の回路基板と前記第2の回路基板とを接続する中継基板と、
前記第1の回路基板、前記第2の回路基板および前記中継基板を接着する接着用樹脂とを備え、
前記中継基板は、
多角形の額縁形状でかつその外周側面の4側面にそれぞれ少なくとも2個の凸部を有するハウジングと、
前記ハウジングの上下面に位置する溝部と、
前記ハウジングの上下面を接続する複数の接続端子電極と、
前記接続端子電極の端部であり前記溝部に形成され前記ハウジングの表面から突出しない複数の接続端子とを有し、
前記接着用樹脂は、
前記接着用樹脂は、同じ外周側面の2つの前記凸部間には形成されず、隣接する前記外周側面に設けられた前記凸部間に形成されていることを特徴とする電子回路実装構造体。 - 前記中継基板の前記ハウジングは、前記外周側面にシールド層を有することを特徴とする請求項1または2記載の電子回路実装構造体。
- 前記シールド層が前記接続端子と電気的に接続することを特徴とする請求項3に記載の電子回路実装構造体。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008522457A JP4858541B2 (ja) | 2006-06-27 | 2007-06-19 | 中継基板および電子回路実装構造体 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006176196 | 2006-06-27 | ||
JP2006176196 | 2006-06-27 | ||
JP2008522457A JP4858541B2 (ja) | 2006-06-27 | 2007-06-19 | 中継基板および電子回路実装構造体 |
PCT/JP2007/062261 WO2008001641A1 (fr) | 2006-06-27 | 2007-06-19 | Substrat d'interconnexion et structure de montage de circuits électroniques |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2008001641A1 JPWO2008001641A1 (ja) | 2009-11-26 |
JP4858541B2 true JP4858541B2 (ja) | 2012-01-18 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2008522457A Expired - Fee Related JP4858541B2 (ja) | 2006-06-27 | 2007-06-19 | 中継基板および電子回路実装構造体 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8018731B2 (ja) |
JP (1) | JP4858541B2 (ja) |
CN (1) | CN101467500B (ja) |
WO (1) | WO2008001641A1 (ja) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100244871A1 (en) * | 2009-02-24 | 2010-09-30 | Qualcomm Incorporated | Space transformer connector printed circuit board assembly |
JP2011096926A (ja) * | 2009-10-30 | 2011-05-12 | Panasonic Corp | 回路基板、コネクタおよび電子機器 |
JP5014470B2 (ja) * | 2010-06-28 | 2012-08-29 | 三菱電機株式会社 | 樹脂封止形電子制御装置、及びその製造方法 |
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- 2007-06-19 JP JP2008522457A patent/JP4858541B2/ja not_active Expired - Fee Related
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CN101467500A (zh) | 2009-06-24 |
US8018731B2 (en) | 2011-09-13 |
US20090268423A1 (en) | 2009-10-29 |
WO2008001641A1 (fr) | 2008-01-03 |
JPWO2008001641A1 (ja) | 2009-11-26 |
CN101467500B (zh) | 2012-08-08 |
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