JP4832629B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4832629B2 JP4832629B2 JP2000304372A JP2000304372A JP4832629B2 JP 4832629 B2 JP4832629 B2 JP 4832629B2 JP 2000304372 A JP2000304372 A JP 2000304372A JP 2000304372 A JP2000304372 A JP 2000304372A JP 4832629 B2 JP4832629 B2 JP 4832629B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor device
- impurity layer
- layer
- silicon oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
- H01L21/76235—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/213—Channel regions of field-effect devices
- H10D62/221—Channel regions of field-effect devices of FETs
- H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000304372A JP4832629B2 (ja) | 2000-10-04 | 2000-10-04 | 半導体装置 |
| US09/805,923 US6541825B2 (en) | 2000-10-04 | 2001-03-15 | Semiconductor device including impurity layer having continuous portions formed at different depths and method of manufacturing the same |
| TW090113457A TW490855B (en) | 2000-10-04 | 2001-06-04 | Semiconductor device and method of manufacturing the same |
| KR10-2001-0032296A KR100388585B1 (ko) | 2000-10-04 | 2001-06-09 | 반도체 장치 및 반도체 장치의 제조 방법 |
| US10/352,097 US6841440B2 (en) | 2000-10-04 | 2003-01-28 | Semiconductor device including impurity layer having continuous portions formed at different depths and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000304372A JP4832629B2 (ja) | 2000-10-04 | 2000-10-04 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002110976A JP2002110976A (ja) | 2002-04-12 |
| JP2002110976A5 JP2002110976A5 (enExample) | 2007-11-01 |
| JP4832629B2 true JP4832629B2 (ja) | 2011-12-07 |
Family
ID=18785428
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000304372A Expired - Fee Related JP4832629B2 (ja) | 2000-10-04 | 2000-10-04 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US6541825B2 (enExample) |
| JP (1) | JP4832629B2 (enExample) |
| KR (1) | KR100388585B1 (enExample) |
| TW (1) | TW490855B (enExample) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4832629B2 (ja) * | 2000-10-04 | 2011-12-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7248559B2 (en) | 2001-10-17 | 2007-07-24 | Nortel Networks Limited | Scattered pilot pattern and channel estimation method for MIMO-OFDM systems |
| DE10311312B4 (de) * | 2003-03-14 | 2007-08-16 | Infineon Technologies Ag | Isolatorstruktur und Verfahren zur Erzeugung von Isolatorstrukturen in einem Halbleitersubstrat |
| JP4578785B2 (ja) * | 2003-05-21 | 2010-11-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP2005277024A (ja) * | 2004-03-24 | 2005-10-06 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US7129559B2 (en) * | 2004-04-09 | 2006-10-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | High voltage semiconductor device utilizing a deep trench structure |
| US20070235783A9 (en) * | 2005-07-19 | 2007-10-11 | Micron Technology, Inc. | Semiconductor constructions, memory arrays, electronic systems, and methods of forming semiconductor constructions |
| US7772672B2 (en) | 2005-09-01 | 2010-08-10 | Micron Technology, Inc. | Semiconductor constructions |
| KR100713924B1 (ko) * | 2005-12-23 | 2007-05-07 | 주식회사 하이닉스반도체 | 돌기형 트랜지스터 및 그의 형성방법 |
| US7799694B2 (en) | 2006-04-11 | 2010-09-21 | Micron Technology, Inc. | Methods of forming semiconductor constructions |
| US7670888B2 (en) * | 2007-04-11 | 2010-03-02 | Texas Instruments Incorporated | Low noise JFET |
| US7906390B2 (en) * | 2007-07-20 | 2011-03-15 | International Business Machines Corporation | Thin gate electrode CMOS devices and methods of fabricating same |
| US8811339B2 (en) * | 2008-07-07 | 2014-08-19 | Blackberry Limited | Handover schemes for wireless systems |
| JP5629450B2 (ja) * | 2009-10-16 | 2014-11-19 | キヤノン株式会社 | 半導体素子及び半導体素子の形成方法 |
| US20120015474A1 (en) * | 2010-07-19 | 2012-01-19 | Yung-Chun Wu | Method for fabricating silicon heterojunction solar cells |
| JP2014007310A (ja) * | 2012-06-26 | 2014-01-16 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置の製造方法および炭化珪素半導体装置 |
| US11322357B2 (en) * | 2020-03-02 | 2022-05-03 | Globalfoundries U.S. Inc. | Buried damage layers for electrical isolation |
| CN113066726B (zh) * | 2021-03-19 | 2021-11-16 | 弘大芯源(深圳)半导体有限公司 | 一种场效应晶体管的实现方法 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6199376A (ja) | 1984-10-19 | 1986-05-17 | Sharp Corp | 半導体装置の製造方法 |
| JP2955459B2 (ja) * | 1993-12-20 | 1999-10-04 | 株式会社東芝 | 半導体装置の製造方法 |
| JPH1065153A (ja) * | 1996-08-15 | 1998-03-06 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JPH10189951A (ja) | 1996-12-26 | 1998-07-21 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
| JP3519571B2 (ja) | 1997-04-11 | 2004-04-19 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| JPH118387A (ja) * | 1997-06-18 | 1999-01-12 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JPH1131742A (ja) * | 1997-07-14 | 1999-02-02 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JP3519579B2 (ja) | 1997-09-09 | 2004-04-19 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
| US6025232A (en) * | 1997-11-12 | 2000-02-15 | Micron Technology, Inc. | Methods of forming field effect transistors and related field effect transistor constructions |
| JP2000082808A (ja) * | 1998-09-04 | 2000-03-21 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP2000150882A (ja) * | 1998-09-04 | 2000-05-30 | Toshiba Corp | Mis型半導体装置及びその製造方法 |
| JP3415459B2 (ja) * | 1998-12-07 | 2003-06-09 | 株式会社東芝 | 半導体装置及びその製造方法 |
| US6287920B1 (en) * | 1999-09-07 | 2001-09-11 | Texas Instruments Incorporated | Method of making multiple threshold voltage integrated of circuit transistors |
| US6277710B1 (en) * | 1999-11-15 | 2001-08-21 | Chartered Semiconductor Manufacturing Ltd. | Method of forming shallow trench isolation |
| JP4832629B2 (ja) * | 2000-10-04 | 2011-12-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2000
- 2000-10-04 JP JP2000304372A patent/JP4832629B2/ja not_active Expired - Fee Related
-
2001
- 2001-03-15 US US09/805,923 patent/US6541825B2/en not_active Expired - Lifetime
- 2001-06-04 TW TW090113457A patent/TW490855B/zh not_active IP Right Cessation
- 2001-06-09 KR KR10-2001-0032296A patent/KR100388585B1/ko not_active Expired - Fee Related
-
2003
- 2003-01-28 US US10/352,097 patent/US6841440B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR20020027161A (ko) | 2002-04-13 |
| TW490855B (en) | 2002-06-11 |
| US6541825B2 (en) | 2003-04-01 |
| US6841440B2 (en) | 2005-01-11 |
| US20020038901A1 (en) | 2002-04-04 |
| JP2002110976A (ja) | 2002-04-12 |
| KR100388585B1 (ko) | 2003-06-25 |
| US20030143810A1 (en) | 2003-07-31 |
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